@@ -52,22 +52,22 @@ func (i2c *I2C) Configure(config I2CConfig) error {
5252//go:inline
5353func (i2c * I2C ) initClock (config I2CConfig ) {
5454 // reset I2C clock
55- esp .SYSTEM .SetPERIP_RST_EN0_EXT0_RST (1 )
56- esp .SYSTEM .SetPERIP_CLK_EN0_EXT0_CLK_EN (1 )
57- esp .SYSTEM .SetPERIP_RST_EN0_EXT0_RST (0 )
55+ esp .SYSTEM .SetPERIP_RST_EN0_I2C_EXT0_RST (1 )
56+ esp .SYSTEM .SetPERIP_CLK_EN0_I2C_EXT0_CLK_EN (1 )
57+ esp .SYSTEM .SetPERIP_RST_EN0_I2C_EXT0_RST (0 )
5858 // disable interrupts
59- esp .I2C .INT_ENA .ClearBits (0x3fff )
60- esp .I2C .INT_CLR .ClearBits (0x3fff )
59+ esp .I2C0 .INT_ENA .ClearBits (0x3fff )
60+ esp .I2C0 .INT_CLR .ClearBits (0x3fff )
6161
62- esp .I2C .SetCLK_CONF_SCLK_SEL (i2cClkSource )
63- esp .I2C .SetCLK_CONF_SCLK_ACTIVE (1 )
64- esp .I2C .SetCLK_CONF_SCLK_DIV_NUM (i2cClkSourceFrequency / (config .Frequency * 1024 ))
65- esp .I2C .SetCTR_CLK_EN (1 )
62+ esp .I2C0 .SetCLK_CONF_SCLK_SEL (i2cClkSource )
63+ esp .I2C0 .SetCLK_CONF_SCLK_ACTIVE (1 )
64+ esp .I2C0 .SetCLK_CONF_SCLK_DIV_NUM (i2cClkSourceFrequency / (config .Frequency * 1024 ))
65+ esp .I2C0 .SetCTR_CLK_EN (1 )
6666}
6767
6868//go:inline
6969func (i2c * I2C ) initNoiseFilter () {
70- esp .I2C .FILTER_CFG .Set (0x377 )
70+ esp .I2C0 .FILTER_CFG .Set (0x377 )
7171}
7272
7373//go:inline
@@ -83,13 +83,13 @@ func (i2c *I2C) initPins(config I2CConfig) {
8383 muxConfig |= 1 << esp .IO_MUX_GPIO_FUN_DRV_Pos
8484 config .SDA .mux ().Set (muxConfig )
8585 config .SDA .outFunc ().Set (54 )
86- inFunc (54 ).Set (uint32 (esp .GPIO_FUNC_IN_SEL_CFG_SIG_IN_SEL | config .SDA ))
86+ inFunc (54 ).Set (uint32 (esp .GPIO_FUNC_IN_SEL_CFG_SEL | config .SDA ))
8787 config .SDA .Set (true )
8888 // Configure the pad with the given IO mux configuration.
89- config .SDA .pinReg ().SetBits (esp .GPIO_PIN_PIN_PAD_DRIVER )
89+ config .SDA .pinReg ().SetBits (esp .GPIO_PIN_PAD_DRIVER )
9090
9191 esp .GPIO .ENABLE .SetBits (1 << int (config .SDA ))
92- esp .I2C .SetCTR_SDA_FORCE_OUT (1 )
92+ esp .I2C0 .SetCTR_SDA_FORCE_OUT (1 )
9393
9494 // SCL
9595 muxConfig = function << esp .IO_MUX_GPIO_MCU_SEL_Pos
@@ -102,10 +102,10 @@ func (i2c *I2C) initPins(config I2CConfig) {
102102 inFunc (53 ).Set (uint32 (config .SCL ))
103103 config .SCL .Set (true )
104104 // Configure the pad with the given IO mux configuration.
105- config .SCL .pinReg ().SetBits (esp .GPIO_PIN_PIN_PAD_DRIVER )
105+ config .SCL .pinReg ().SetBits (esp .GPIO_PIN_PAD_DRIVER )
106106
107107 esp .GPIO .ENABLE .SetBits (1 << int (config .SCL ))
108- esp .I2C .SetCTR_SCL_FORCE_OUT (1 )
108+ esp .I2C0 .SetCTR_SCL_FORCE_OUT (1 )
109109}
110110
111111//go:inline
@@ -127,48 +127,48 @@ func (i2c *I2C) initFrequency(config I2CConfig) {
127127 setup := halfCycle
128128 hold := halfCycle
129129
130- esp .I2C .SetSCL_LOW_PERIOD (sclLow - 1 )
131- esp .I2C .SetSCL_HIGH_PERIOD (sclHigh )
132- esp .I2C .SetSCL_HIGH_PERIOD_SCL_WAIT_HIGH_PERIOD (25 )
133- esp .I2C .SetSCL_RSTART_SETUP_TIME (setup )
134- esp .I2C .SetSCL_STOP_SETUP_TIME (setup )
135- esp .I2C .SetSCL_START_HOLD_TIME (hold - 1 )
136- esp .I2C .SetSCL_STOP_HOLD_TIME (hold - 1 )
137- esp .I2C .SetSDA_SAMPLE_TIME (sda_sample )
138- esp .I2C .SetSDA_HOLD_TIME (sdaHold )
130+ esp .I2C0 .SetSCL_LOW_PERIOD (sclLow - 1 )
131+ esp .I2C0 .SetSCL_HIGH_PERIOD (sclHigh )
132+ esp .I2C0 .SetSCL_HIGH_PERIOD_SCL_WAIT_HIGH_PERIOD (25 )
133+ esp .I2C0 .SetSCL_RSTART_SETUP_TIME (setup )
134+ esp .I2C0 .SetSCL_STOP_SETUP_TIME (setup )
135+ esp .I2C0 .SetSCL_START_HOLD_TIME (hold - 1 )
136+ esp .I2C0 .SetSCL_STOP_HOLD_TIME (hold - 1 )
137+ esp .I2C0 .SetSDA_SAMPLE_TIME (sda_sample )
138+ esp .I2C0 .SetSDA_HOLD_TIME (sdaHold )
139139}
140140
141141//go:inline
142142func (i2c * I2C ) startMaster () {
143143 // FIFO mode for data
144- esp .I2C .SetFIFO_CONF_NONFIFO_EN (0 )
144+ esp .I2C0 .SetFIFO_CONF_NONFIFO_EN (0 )
145145 // Reset TX & RX buffers
146- esp .I2C .SetFIFO_CONF_RX_FIFO_RST (1 )
147- esp .I2C .SetFIFO_CONF_RX_FIFO_RST (0 )
148- esp .I2C .SetFIFO_CONF_TX_FIFO_RST (1 )
149- esp .I2C .SetFIFO_CONF_TX_FIFO_RST (0 )
146+ esp .I2C0 .SetFIFO_CONF_RX_FIFO_RST (1 )
147+ esp .I2C0 .SetFIFO_CONF_RX_FIFO_RST (0 )
148+ esp .I2C0 .SetFIFO_CONF_TX_FIFO_RST (1 )
149+ esp .I2C0 .SetFIFO_CONF_TX_FIFO_RST (0 )
150150 // set timeout value
151- esp .I2C .TO .Set (0x10 )
151+ esp .I2C0 .TO .Set (0x10 )
152152 // enable master mode
153- esp .I2C .CTR .Set (0x113 )
154- esp .I2C .SetCTR_CONF_UPGATE (1 )
153+ esp .I2C0 .CTR .Set (0x113 )
154+ esp .I2C0 .SetCTR_CONF_UPGATE (1 )
155155 resetMaster ()
156156}
157157
158158//go:inline
159159func resetMaster () {
160160 // reset FSM
161- esp .I2C .SetCTR_FSM_RST (1 )
161+ esp .I2C0 .SetCTR_FSM_RST (1 )
162162 // clear the bus
163- esp .I2C .SetSCL_SP_CONF_SCL_RST_SLV_NUM (9 )
164- esp .I2C .SetSCL_SP_CONF_SCL_RST_SLV_EN (1 )
165- esp .I2C .SetSCL_STRETCH_CONF_SLAVE_SCL_STRETCH_EN (1 )
166- esp .I2C .SetCTR_CONF_UPGATE (1 )
167- esp .I2C .FILTER_CFG .Set (0x377 )
163+ esp .I2C0 .SetSCL_SP_CONF_SCL_RST_SLV_NUM (9 )
164+ esp .I2C0 .SetSCL_SP_CONF_SCL_RST_SLV_EN (1 )
165+ esp .I2C0 .SetSCL_STRETCH_CONF_SLAVE_SCL_STRETCH_EN (1 )
166+ esp .I2C0 .SetCTR_CONF_UPGATE (1 )
167+ esp .I2C0 .FILTER_CFG .Set (0x377 )
168168 // wait for SCL_RST_SLV_EN
169- for esp .I2C .GetSCL_SP_CONF_SCL_RST_SLV_EN () != 0 {
169+ for esp .I2C0 .GetSCL_SP_CONF_SCL_RST_SLV_EN () != 0 {
170170 }
171- esp .I2C .SetSCL_SP_CONF_SCL_RST_SLV_NUM (0 )
171+ esp .I2C0 .SetSCL_SP_CONF_SCL_RST_SLV_NUM (0 )
172172}
173173
174174type i2cCommandType = uint32
@@ -194,21 +194,21 @@ func nanotime() int64
194194
195195func (i2c * I2C ) transmit (addr uint16 , cmd []i2cCommand , timeoutMS int ) error {
196196 const intMask = esp .I2C_INT_STATUS_END_DETECT_INT_ST_Msk | esp .I2C_INT_STATUS_TRANS_COMPLETE_INT_ST_Msk | esp .I2C_INT_STATUS_TIME_OUT_INT_ST_Msk | esp .I2C_INT_STATUS_NACK_INT_ST_Msk
197- esp .I2C .INT_CLR .SetBits (intMask )
198- esp .I2C .INT_ENA .SetBits (intMask )
199- esp .I2C .SetCTR_CONF_UPGATE (1 )
197+ esp .I2C0 .INT_CLR .SetBits (intMask )
198+ esp .I2C0 .INT_ENA .SetBits (intMask )
199+ esp .I2C0 .SetCTR_CONF_UPGATE (1 )
200200
201201 defer func () {
202- esp .I2C .INT_CLR .SetBits (intMask )
203- esp .I2C .INT_ENA .ClearBits (intMask )
202+ esp .I2C0 .INT_CLR .SetBits (intMask )
203+ esp .I2C0 .INT_ENA .ClearBits (intMask )
204204 }()
205205
206206 timeoutNS := int64 (timeoutMS ) * 1000000
207207 needAddress := true
208208 needRestart := false
209209 readLast := false
210210 var readTo []byte
211- for cmdIdx , reg := 0 , & esp .I2C .COMD0 ; cmdIdx < len (cmd ); {
211+ for cmdIdx , reg := 0 , & esp .I2C0 .COMD0 ; cmdIdx < len (cmd ); {
212212 c := & cmd [cmdIdx ]
213213
214214 switch c .cmd {
@@ -221,13 +221,13 @@ func (i2c *I2C) transmit(addr uint16, cmd []i2cCommand, timeoutMS int) error {
221221 count := 32
222222 if needAddress {
223223 needAddress = false
224- esp .I2C . SetFIFO_DATA_FIFO_RDATA ((uint32 (addr ) & 0x7f ) << 1 )
224+ esp .I2C0 . SetDATA_FIFO_RDATA ((uint32 (addr ) & 0x7f ) << 1 )
225225 count --
226- esp .I2C .SLAVE_ADDR .Set (uint32 (addr ))
227- esp .I2C .SetCTR_CONF_UPGATE (1 )
226+ esp .I2C0 .SLAVE_ADDR .Set (uint32 (addr ))
227+ esp .I2C0 .SetCTR_CONF_UPGATE (1 )
228228 }
229229 for ; count > 0 && c .head < len (c .data ); count , c .head = count - 1 , c .head + 1 {
230- esp .I2C . SetFIFO_DATA_FIFO_RDATA (uint32 (c .data [c .head ]))
230+ esp .I2C0 . SetDATA_FIFO_RDATA (uint32 (c .data [c .head ]))
231231 }
232232 reg .Set (i2cCMD_WRITE | uint32 (32 - count ))
233233 reg = nextAddress (reg )
@@ -243,8 +243,8 @@ func (i2c *I2C) transmit(addr uint16, cmd []i2cCommand, timeoutMS int) error {
243243 case i2cCMD_READ :
244244 if needAddress {
245245 needAddress = false
246- esp .I2C . SetFIFO_DATA_FIFO_RDATA ((uint32 (addr )& 0x7f )<< 1 | 1 )
247- esp .I2C .SLAVE_ADDR .Set (uint32 (addr ))
246+ esp .I2C0 . SetDATA_FIFO_RDATA ((uint32 (addr )& 0x7f )<< 1 | 1 )
247+ esp .I2C0 .SLAVE_ADDR .Set (uint32 (addr ))
248248 reg .Set (i2cCMD_WRITE | 1 )
249249 reg = nextAddress (reg )
250250 }
@@ -256,7 +256,7 @@ func (i2c *I2C) transmit(addr uint16, cmd []i2cCommand, timeoutMS int) error {
256256 reg .Set (i2cCMD_WRITE | 1 )
257257
258258 reg = nextAddress (reg )
259- esp .I2C . SetFIFO_DATA_FIFO_RDATA ((uint32 (addr )& 0x7f )<< 1 | 1 )
259+ esp .I2C0 . SetDATA_FIFO_RDATA ((uint32 (addr )& 0x7f )<< 1 | 1 )
260260 needRestart = false
261261 }
262262 count := 32
@@ -291,11 +291,11 @@ func (i2c *I2C) transmit(addr uint16, cmd []i2cCommand, timeoutMS int) error {
291291 }
292292 if reg == nil {
293293 // transmit now
294- esp .I2C .SetCTR_CONF_UPGATE (1 )
295- esp .I2C .SetCTR_TRANS_START (1 )
294+ esp .I2C0 .SetCTR_CONF_UPGATE (1 )
295+ esp .I2C0 .SetCTR_TRANS_START (1 )
296296 end := nanotime () + timeoutNS
297297 var mask uint32
298- for mask = esp .I2C .INT_STATUS .Get (); mask & intMask == 0 ; mask = esp .I2C .INT_STATUS .Get () {
298+ for mask = esp .I2C0 .INT_STATUS .Get (); mask & intMask == 0 ; mask = esp .I2C0 .INT_STATUS .Get () {
299299 if nanotime () > end {
300300 if readTo != nil {
301301 return errI2CReadTimeout
@@ -312,13 +312,13 @@ func (i2c *I2C) transmit(addr uint16, cmd []i2cCommand, timeoutMS int) error {
312312 }
313313 return errI2CWriteTimeout
314314 }
315- esp .I2C .INT_CLR .SetBits (intMask )
315+ esp .I2C0 .INT_CLR .SetBits (intMask )
316316 for i := 0 ; i < len (readTo ); i ++ {
317- readTo [i ] = byte (esp .I2C . GetFIFO_DATA_FIFO_RDATA () & 0xff )
317+ readTo [i ] = byte (esp .I2C0 . GetDATA_FIFO_RDATA () & 0xff )
318318 c .head ++
319319 }
320320 readTo = nil
321- reg = & esp .I2C .COMD0
321+ reg = & esp .I2C0 .COMD0
322322 }
323323 }
324324 return nil
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