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machine/atsamd51x,runtime/atsamd51x: fixes needed for full support for all PWM pins. Also adds some useful constants to clarify peripheral clock usage
Signed-off-by: deadprogram <[email protected]>
1 parent ecaf946 commit 58565fa

13 files changed

+231
-87
lines changed

‎Makefile‎

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -317,6 +317,15 @@ smoketest:
317317
@$(MD5SUM) test.hex
318318
$(TINYGO) build -size short -o test.hex -target=itsybitsy-nrf52840 examples/blinky1
319319
@$(MD5SUM) test.hex
320+
# test pwm
321+
$(TINYGO) build -size short -o test.hex -target=itsybitsy-m0 examples/pwm
322+
@$(MD5SUM) test.hex
323+
$(TINYGO) build -size short -o test.hex -target=itsybitsy-m4 examples/pwm
324+
@$(MD5SUM) test.hex
325+
$(TINYGO) build -size short -o test.hex -target=feather-m4 examples/pwm
326+
@$(MD5SUM) test.hex
327+
$(TINYGO) build -size short -o test.hex -target=pyportal examples/pwm
328+
@$(MD5SUM) test.hex
320329
ifneq ($(AVR), 0)
321330
$(TINYGO) build -size short -o test.hex -target=atmega1284p examples/serial
322331
@$(MD5SUM) test.hex

‎src/device/sam/atsamd51x-bitfields.go‎

Lines changed: 63 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,63 @@
1+
// Hand created file. DO NOT DELETE.
2+
// atsamd51x bitfield definitions that are not auto-generated by gen-device-svd.go
3+
4+
// +build sam,atsamd51
5+
6+
// These are the supported pchctrl function numberings on the atsamd51x
7+
// See http://ww1.microchip.com/downloads/en/DeviceDoc/SAM_D5xE5x_Family_Data_Sheet_DS60001507F.pdf
8+
// table 14-9
9+
10+
package sam
11+
12+
const (
13+
PCHCTRL_GCLK_OSCCTRL_DFLL48 = 0 // DFLL48 input clock source
14+
PCHCTRL_GCLK_OSCCTRL_FDPLL0 = 1 // Reference clock for FDPLL0
15+
PCHCTRL_GCLK_OSCCTRL_FDPLL1 = 2 // Reference clock for FDPLL1
16+
PCHCTRL_GCLK_OSCCTRL_FDPLL0_32K = 3
17+
PCHCTRL_GCLK_OSCCTRL_FDPLL1_32K = 3
18+
PCHCTRL_GCLK_SDHC0_SLOW = 3
19+
PCHCTRL_GCLK_SDHC1_SLOW = 3
20+
// GCLK_SERCOM[0..7]_SLOW = 3
21+
// FDPLL0 = 3 // 32KHz clock for internal lock timer
22+
// FDPLL1 = 3 //32KHz clock for internal lock timer
23+
// SDHC0 = 3 // Slow
24+
// SDHC1 = 3 // Slow
25+
PCHCTRL_GCLK_EIC = 4
26+
PCHCTRL_GCLK_FREQM_MSR = 5 // FREQM Measure
27+
PCHCTRL_GCLK_FREQM_REF = 6 // FREQM Reference
28+
PCHCTRL_GCLK_SERCOM0_CORE = 7 // SERCOM0 Core
29+
PCHCTRL_GCLK_SERCOM1_CORE = 8 // SERCOM1 Core
30+
PCHCTRL_GCLK_TC0 = 9
31+
PCHCTRL_GCLK_TC1 = 9 // TC0, TC1
32+
PCHCTRL_GCLK_USB = 10 // USB
33+
//22:11 GCLK_EVSYS[0..11] EVSYS[0..11]
34+
PCHCTRL_GCLK_SERCOM2_CORE = 23 // SERCOM2 Core
35+
PCHCTRL_GCLK_SERCOM3_CORE = 24 //SERCOM3 Core
36+
PCHCTRL_GCLK_TCC0 = 25
37+
PCHCTRL_GCLK_TCC1 = 25 // TCC0, TCC1
38+
PCHCTRL_GCLK_TC2 = 26
39+
PCHCTRL_GCLK_TC3 = 26 // TC2, TC3
40+
PCHCTRL_GCLK_CAN0 = 27 // CAN0
41+
PCHCTRL_GCLK_CAN1 = 28 // CAN1
42+
PCHCTRL_GCLK_TCC2 = 29
43+
PCHCTRL_GCLK_TCC3 = 29 // TCC2, TCC3
44+
PCHCTRL_GCLK_TC4 = 30
45+
PCHCTRL_GCLK_TC5 = 30 // TC4, TC5
46+
PCHCTRL_GCLK_PDEC = 31 // PDEC
47+
PCHCTRL_GCLK_AC = 32 // AC
48+
PCHCTRL_GCLK_CCL = 33 // CCL
49+
PCHCTRL_GCLK_SERCOM4_CORE = 34 // SERCOM4 Core
50+
PCHCTRL_GCLK_SERCOM5_CORE = 35 // SERCOM5 Core
51+
PCHCTRL_GCLK_SERCOM6_CORE = 36 // SERCOM6 Core
52+
PCHCTRL_GCLK_SERCOM7_CORE = 37 // SERCOM7 Core
53+
PCHCTRL_GCLK_TCC4 = 38 // TCC4
54+
PCHCTRL_GCLK_TC6 = 39
55+
PCHCTRL_GCLK_TC7 = 39 // TC6, TC7
56+
PCHCTRL_GCLK_ADC0 = 40 // ADC0
57+
PCHCTRL_GCLK_ADC1 = 41 // ADC1
58+
PCHCTRL_GCLK_DAC = 42 // DAC
59+
//44:43 GCLK_I2S I2S
60+
PCHCTRL_GCLK_SDHC0 = 45 // SDHC0
61+
PCHCTRL_GCLK_SDHC1 = 46 // SDHC1
62+
PCHCTRL_GCLK_CM4_TRACE = 47 // CM4 Trace
63+
)

‎src/examples/pwm/pwm.go‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -8,7 +8,7 @@ import (
88
// This example assumes that an RGB LED is connected to pins 3, 5 and 6 on an Arduino.
99
// Change the values below to use different pins.
1010
const (
11-
redPin = machine.D3
11+
redPin = machine.D4
1212
greenPin = machine.D5
1313
bluePin = machine.D6
1414
)

‎src/machine/machine_atsamd51.go‎

Lines changed: 53 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -1580,14 +1580,14 @@ func (pwm PWM) setPinCfg(val uint8) {
15801580
// setChannel sets the value for the correct channel for PWM on this pin.
15811581
func (pwm PWM) setChannel(timer *sam.TCC_Type, val uint32) {
15821582
switch pwm.Pin {
1583-
case PA16:
1584-
timer.CC[0].Set(val)
1585-
case PA17:
1586-
timer.CC[1].Set(val)
15871583
case PA14:
15881584
timer.CC[0].Set(val)
15891585
case PA15:
15901586
timer.CC[1].Set(val)
1587+
case PA16:
1588+
timer.CC[0].Set(val)
1589+
case PA17:
1590+
timer.CC[1].Set(val)
15911591
case PA18:
15921592
timer.CC[2].Set(val)
15931593
case PA19:
@@ -1596,10 +1596,22 @@ func (pwm PWM) setChannel(timer *sam.TCC_Type, val uint32) {
15961596
timer.CC[0].Set(val)
15971597
case PA21:
15981598
timer.CC[1].Set(val)
1599-
case PA23:
1600-
timer.CC[3].Set(val)
16011599
case PA22:
16021600
timer.CC[2].Set(val)
1601+
case PA23:
1602+
timer.CC[3].Set(val)
1603+
case PB12:
1604+
timer.CC[0].Set(val)
1605+
case PB13:
1606+
timer.CC[1].Set(val)
1607+
case PB14:
1608+
timer.CC[0].Set(val)
1609+
case PB15:
1610+
timer.CC[1].Set(val)
1611+
case PB16:
1612+
timer.CC[4].Set(val)
1613+
case PB17:
1614+
timer.CC[5].Set(val)
16031615
case PB31:
16041616
timer.CC[1].Set(val)
16051617
default:
@@ -1610,14 +1622,14 @@ func (pwm PWM) setChannel(timer *sam.TCC_Type, val uint32) {
16101622
// setChannelBuffer sets the value for the correct channel buffer for PWM on this pin
16111623
func (pwm PWM) setChannelBuffer(timer *sam.TCC_Type, val uint32) {
16121624
switch pwm.Pin {
1613-
case PA16:
1614-
timer.CCBUF[0].Set(val)
1615-
case PA17:
1616-
timer.CCBUF[1].Set(val)
16171625
case PA14:
16181626
timer.CCBUF[0].Set(val)
16191627
case PA15:
16201628
timer.CCBUF[1].Set(val)
1629+
case PA16:
1630+
timer.CCBUF[0].Set(val)
1631+
case PA17:
1632+
timer.CCBUF[1].Set(val)
16211633
case PA18:
16221634
timer.CCBUF[2].Set(val)
16231635
case PA19:
@@ -1626,10 +1638,22 @@ func (pwm PWM) setChannelBuffer(timer *sam.TCC_Type, val uint32) {
16261638
timer.CCBUF[0].Set(val)
16271639
case PA21:
16281640
timer.CCBUF[1].Set(val)
1629-
case PA23:
1630-
timer.CCBUF[3].Set(val)
16311641
case PA22:
16321642
timer.CCBUF[2].Set(val)
1643+
case PA23:
1644+
timer.CCBUF[3].Set(val)
1645+
case PB12:
1646+
timer.CCBUF[0].Set(val)
1647+
case PB13:
1648+
timer.CCBUF[1].Set(val)
1649+
case PB14:
1650+
timer.CCBUF[0].Set(val)
1651+
case PB15:
1652+
timer.CCBUF[1].Set(val)
1653+
case PB16:
1654+
timer.CCBUF[4].Set(val)
1655+
case PB17:
1656+
timer.CCBUF[5].Set(val)
16331657
case PB31:
16341658
timer.CCBUF[1].Set(val)
16351659
default:
@@ -1640,14 +1664,14 @@ func (pwm PWM) setChannelBuffer(timer *sam.TCC_Type, val uint32) {
16401664
// getMux returns the pin mode mux to be used for PWM on this pin.
16411665
func (pwm PWM) getMux() PinMode {
16421666
switch pwm.Pin {
1643-
case PA16:
1644-
return PinPWMF
1645-
case PA17:
1646-
return PinPWMF
16471667
case PA14:
16481668
return PinPWMF
16491669
case PA15:
16501670
return PinPWMF
1671+
case PA16:
1672+
return PinPWMF
1673+
case PA17:
1674+
return PinPWMF
16511675
case PA18:
16521676
return PinPWMF
16531677
case PA19:
@@ -1656,9 +1680,21 @@ func (pwm PWM) getMux() PinMode {
16561680
return PinPWMG
16571681
case PA21:
16581682
return PinPWMG
1683+
case PA22:
1684+
return PinPWMG
16591685
case PA23:
16601686
return PinPWMG
1661-
case PA22:
1687+
case PB12:
1688+
return PinPWMF
1689+
case PB13:
1690+
return PinPWMF
1691+
case PB14:
1692+
return PinPWMF
1693+
case PB15:
1694+
return PinPWMF
1695+
case PB16:
1696+
return PinPWMG
1697+
case PB17:
16621698
return PinPWMG
16631699
case PB31:
16641700
return PinPWMF

‎src/machine/machine_atsamd51g19.go‎

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -18,23 +18,23 @@ func InitPWM() {
1818
sam.MCLK.APBCMASK.SetBits(sam.MCLK_APBCMASK_TCC2_)
1919

2020
//use clock generator 0
21-
sam.GCLK.PCHCTRL[25].Set((sam.GCLK_PCHCTRL_GEN_GCLK0 << sam.GCLK_PCHCTRL_GEN_Pos) |
21+
sam.GCLK.PCHCTRL[sam.PCHCTRL_GCLK_TCC0].Set((sam.GCLK_PCHCTRL_GEN_GCLK0 << sam.GCLK_PCHCTRL_GEN_Pos) |
2222
sam.GCLK_PCHCTRL_CHEN)
23-
sam.GCLK.PCHCTRL[29].Set((sam.GCLK_PCHCTRL_GEN_GCLK0 << sam.GCLK_PCHCTRL_GEN_Pos) |
23+
sam.GCLK.PCHCTRL[sam.PCHCTRL_GCLK_TCC2].Set((sam.GCLK_PCHCTRL_GEN_GCLK0 << sam.GCLK_PCHCTRL_GEN_Pos) |
2424
sam.GCLK_PCHCTRL_CHEN)
2525
}
2626

2727
// getTimer returns the timer to be used for PWM on this pin
2828
func (pwm PWM) getTimer() *sam.TCC_Type {
2929
switch pwm.Pin {
30-
case PA16:
31-
return sam.TCC1
32-
case PA17:
33-
return sam.TCC1
3430
case PA14:
3531
return sam.TCC2
3632
case PA15:
3733
return sam.TCC2
34+
case PA16:
35+
return sam.TCC1
36+
case PA17:
37+
return sam.TCC1
3838
case PA18:
3939
return sam.TCC1
4040
case PA19:
@@ -43,10 +43,10 @@ func (pwm PWM) getTimer() *sam.TCC_Type {
4343
return sam.TCC0
4444
case PA21:
4545
return sam.TCC0
46-
case PA23:
47-
return sam.TCC0
4846
case PA22:
4947
return sam.TCC0
48+
case PA23:
49+
return sam.TCC0
5050
default:
5151
return nil // not supported on this pin
5252
}

‎src/machine/machine_atsamd51j19.go‎

Lines changed: 22 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -3,7 +3,7 @@
33
// Peripheral abstraction layer for the atsamd51.
44
//
55
// Datasheet:
6-
// http://ww1.microchip.com/downloads/en/DeviceDoc/60001507C.pdf
6+
// http://ww1.microchip.com/downloads/en/DeviceDoc/SAM_D5xE5x_Family_Data_Sheet_DS60001507F.pdf
77
//
88
package machine
99

@@ -15,29 +15,29 @@ const HSRAM_SIZE = 0x00030000
1515
func InitPWM() {
1616
// turn on timer clocks used for PWM
1717
sam.MCLK.APBBMASK.SetBits(sam.MCLK_APBBMASK_TCC0_ | sam.MCLK_APBBMASK_TCC1_)
18-
sam.MCLK.APBCMASK.SetBits(sam.MCLK_APBCMASK_TCC2_)
18+
sam.MCLK.APBCMASK.SetBits(sam.MCLK_APBCMASK_TCC2_ | sam.MCLK_APBCMASK_TCC3_)
1919
sam.MCLK.APBDMASK.SetBits(sam.MCLK_APBDMASK_TCC4_)
2020

2121
//use clock generator 0
22-
sam.GCLK.PCHCTRL[25].Set((sam.GCLK_PCHCTRL_GEN_GCLK0 << sam.GCLK_PCHCTRL_GEN_Pos) |
22+
sam.GCLK.PCHCTRL[sam.PCHCTRL_GCLK_TCC0].Set((sam.GCLK_PCHCTRL_GEN_GCLK0 << sam.GCLK_PCHCTRL_GEN_Pos) |
2323
sam.GCLK_PCHCTRL_CHEN)
24-
sam.GCLK.PCHCTRL[29].Set((sam.GCLK_PCHCTRL_GEN_GCLK0 << sam.GCLK_PCHCTRL_GEN_Pos) |
24+
sam.GCLK.PCHCTRL[sam.PCHCTRL_GCLK_TCC2].Set((sam.GCLK_PCHCTRL_GEN_GCLK0 << sam.GCLK_PCHCTRL_GEN_Pos) |
2525
sam.GCLK_PCHCTRL_CHEN)
26-
sam.GCLK.PCHCTRL[38].Set((sam.GCLK_PCHCTRL_GEN_GCLK0 << sam.GCLK_PCHCTRL_GEN_Pos) |
26+
sam.GCLK.PCHCTRL[sam.PCHCTRL_GCLK_TCC4].Set((sam.GCLK_PCHCTRL_GEN_GCLK0 << sam.GCLK_PCHCTRL_GEN_Pos) |
2727
sam.GCLK_PCHCTRL_CHEN)
2828
}
2929

3030
// getTimer returns the timer to be used for PWM on this pin
3131
func (pwm PWM) getTimer() *sam.TCC_Type {
3232
switch pwm.Pin {
33-
case PA16:
34-
return sam.TCC1
35-
case PA17:
36-
return sam.TCC1
3733
case PA14:
3834
return sam.TCC2
3935
case PA15:
4036
return sam.TCC2
37+
case PA16:
38+
return sam.TCC1
39+
case PA17:
40+
return sam.TCC1
4141
case PA18:
4242
return sam.TCC1
4343
case PA19:
@@ -46,9 +46,21 @@ func (pwm PWM) getTimer() *sam.TCC_Type {
4646
return sam.TCC0
4747
case PA21:
4848
return sam.TCC0
49+
case PA22:
50+
return sam.TCC0
4951
case PA23:
5052
return sam.TCC0
51-
case PA22:
53+
case PB12:
54+
return sam.TCC3
55+
case PB13:
56+
return sam.TCC3
57+
case PB14:
58+
return sam.TCC4
59+
case PB15:
60+
return sam.TCC4
61+
case PB16:
62+
return sam.TCC0
63+
case PB17:
5264
return sam.TCC0
5365
case PB31:
5466
return sam.TCC4

‎src/machine/machine_atsamd51j20.go‎

Lines changed: 21 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -15,29 +15,29 @@ const HSRAM_SIZE = 0x00040000
1515
func InitPWM() {
1616
// turn on timer clocks used for PWM
1717
sam.MCLK.APBBMASK.SetBits(sam.MCLK_APBBMASK_TCC0_ | sam.MCLK_APBBMASK_TCC1_)
18-
sam.MCLK.APBCMASK.SetBits(sam.MCLK_APBCMASK_TCC2_)
18+
sam.MCLK.APBCMASK.SetBits(sam.MCLK_APBCMASK_TCC2_ | sam.MCLK_APBCMASK_TCC3_)
1919
sam.MCLK.APBDMASK.SetBits(sam.MCLK_APBDMASK_TCC4_)
2020

2121
//use clock generator 0
22-
sam.GCLK.PCHCTRL[25].Set((sam.GCLK_PCHCTRL_GEN_GCLK0 << sam.GCLK_PCHCTRL_GEN_Pos) |
22+
sam.GCLK.PCHCTRL[sam.PCHCTRL_GCLK_TCC0].Set((sam.GCLK_PCHCTRL_GEN_GCLK0 << sam.GCLK_PCHCTRL_GEN_Pos) |
2323
sam.GCLK_PCHCTRL_CHEN)
24-
sam.GCLK.PCHCTRL[29].Set((sam.GCLK_PCHCTRL_GEN_GCLK0 << sam.GCLK_PCHCTRL_GEN_Pos) |
24+
sam.GCLK.PCHCTRL[sam.PCHCTRL_GCLK_TCC2].Set((sam.GCLK_PCHCTRL_GEN_GCLK0 << sam.GCLK_PCHCTRL_GEN_Pos) |
2525
sam.GCLK_PCHCTRL_CHEN)
26-
sam.GCLK.PCHCTRL[38].Set((sam.GCLK_PCHCTRL_GEN_GCLK0 << sam.GCLK_PCHCTRL_GEN_Pos) |
26+
sam.GCLK.PCHCTRL[sam.PCHCTRL_GCLK_TCC4].Set((sam.GCLK_PCHCTRL_GEN_GCLK0 << sam.GCLK_PCHCTRL_GEN_Pos) |
2727
sam.GCLK_PCHCTRL_CHEN)
2828
}
2929

3030
// getTimer returns the timer to be used for PWM on this pin
3131
func (pwm PWM) getTimer() *sam.TCC_Type {
3232
switch pwm.Pin {
33-
case PA16:
34-
return sam.TCC1
35-
case PA17:
36-
return sam.TCC1
3733
case PA14:
3834
return sam.TCC2
3935
case PA15:
4036
return sam.TCC2
37+
case PA16:
38+
return sam.TCC1
39+
case PA17:
40+
return sam.TCC1
4141
case PA18:
4242
return sam.TCC1
4343
case PA19:
@@ -46,9 +46,21 @@ func (pwm PWM) getTimer() *sam.TCC_Type {
4646
return sam.TCC0
4747
case PA21:
4848
return sam.TCC0
49+
case PA22:
50+
return sam.TCC0
4951
case PA23:
5052
return sam.TCC0
51-
case PA22:
53+
case PB12:
54+
return sam.TCC3
55+
case PB13:
56+
return sam.TCC3
57+
case PB14:
58+
return sam.TCC4
59+
case PB15:
60+
return sam.TCC4
61+
case PB16:
62+
return sam.TCC0
63+
case PB17:
5264
return sam.TCC0
5365
case PB31:
5466
return sam.TCC4

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