|
| 1 | +package x86 |
| 2 | + |
| 3 | +const ( |
| 4 | + // CPUID_TIME_STAMP_COUNTER |
| 5 | + // EAX Returns processor base frequency information described by the |
| 6 | + // type CPUID_PROCESSOR_FREQUENCY_EAX. |
| 7 | + // EBX Returns maximum frequency information described by the type |
| 8 | + // CPUID_PROCESSOR_FREQUENCY_EBX. |
| 9 | + // ECX Returns bus frequency information described by the type |
| 10 | + // CPUID_PROCESSOR_FREQUENCY_ECX. |
| 11 | + // EDX Reserved. |
| 12 | + CPUID_TIME_STAMP_COUNTER = 0x15 |
| 13 | + |
| 14 | + // CPUID_PROCESSOR_FREQUENCY |
| 15 | + // EAX Returns processor base frequency information described by the |
| 16 | + // type CPUID_PROCESSOR_FREQUENCY_EAX. |
| 17 | + // EBX Returns maximum frequency information described by the type |
| 18 | + // CPUID_PROCESSOR_FREQUENCY_EBX. |
| 19 | + // ECX Returns bus frequency information described by the type |
| 20 | + // CPUID_PROCESSOR_FREQUENCY_ECX. |
| 21 | + // EDX Reserved. |
| 22 | + CPUID_PROCESSOR_FREQUENCY = 0x16 |
| 23 | +) |
| 24 | + |
| 25 | +//export asmReadRdtsc |
| 26 | +func AsmReadRdtsc() uint64 |
| 27 | + |
| 28 | +//export asmCpuid |
| 29 | +func AsmCpuid(index int, registerEax *uint32, registerRbx *uint32, registerEcx *uint32, registerEdx *uint32) |
| 30 | + |
| 31 | +func InternalGetPerformanceCounterFrequency() uint64 { |
| 32 | + return CpuidCoreClockCalculateTscFrequency() |
| 33 | +} |
| 34 | + |
| 35 | +func GetTimeInNanoSecond(ticks uint64) int64 { |
| 36 | + frequency := InternalGetPerformanceCounterFrequency() |
| 37 | + return ConvertTimeInNanoSecond(frequency, ticks) |
| 38 | +} |
| 39 | + |
| 40 | +func ConvertTimeInNanoSecond(frequency uint64, ticks uint64) int64 { |
| 41 | + // Ticks |
| 42 | + // Time = --------- x 1,000,000,000 |
| 43 | + // Frequency |
| 44 | + nanoSeconds := (ticks / frequency) * 1000000000 |
| 45 | + remainder := ticks % frequency |
| 46 | + |
| 47 | + // Ensure (Remainder * 1,000,000,000) will not overflow 64-bit. |
| 48 | + // Since 2^29 < 1,000,000,000 = 0x3B9ACA00 < 2^30, Remainder should < 2^(64-30) = 2^34, |
| 49 | + // i.e. highest bit set in Remainder should <= 33. |
| 50 | + // |
| 51 | + shift := highBitSet64(remainder) - 32 |
| 52 | + if shift < 0 { |
| 53 | + shift = 0 |
| 54 | + } |
| 55 | + remainder = remainder >> shift |
| 56 | + frequency = frequency >> shift |
| 57 | + nanoSeconds += remainder * 1000000000 / frequency |
| 58 | + |
| 59 | + return int64(nanoSeconds) |
| 60 | +} |
| 61 | + |
| 62 | +func GetTicksFromNanoSeconds(nano uint64) uint64 { |
| 63 | + frequency := InternalGetPerformanceCounterFrequency() |
| 64 | + return nano * frequency / 1000000000 |
| 65 | +} |
| 66 | + |
| 67 | +func highBitSet64(operand uint64) int { |
| 68 | + if operand == (operand & 0xffffffff) { |
| 69 | + return highBitSet32(uint32(operand)) |
| 70 | + } |
| 71 | + return highBitSet32(uint32(operand>>32)) + 32 |
| 72 | +} |
| 73 | + |
| 74 | +func highBitSet32(operand uint32) int { |
| 75 | + if operand == 0 { |
| 76 | + return -1 |
| 77 | + } |
| 78 | + bitIndex := 32 |
| 79 | + for operand > 0 { |
| 80 | + bitIndex-- |
| 81 | + operand <<= 1 |
| 82 | + } |
| 83 | + return bitIndex |
| 84 | +} |
| 85 | + |
| 86 | +/* |
| 87 | +
|
| 88 | +UINT64 |
| 89 | +EFIAPI |
| 90 | +GetTimeInNanoSecond ( |
| 91 | + IN UINT64 Ticks |
| 92 | + ) |
| 93 | +{ |
| 94 | + UINT64 Frequency; |
| 95 | + UINT64 NanoSeconds; |
| 96 | + UINT64 Remainder; |
| 97 | + INTN Shift; |
| 98 | +
|
| 99 | + Frequency = GetPerformanceCounterProperties (NULL, NULL); |
| 100 | +
|
| 101 | + NanoSeconds = MultU64x32 (DivU64x64Remainder (Ticks, Frequency, &Remainder), 1000000000u); |
| 102 | +
|
| 103 | + // |
| 104 | + // Ensure (Remainder * 1,000,000,000) will not overflow 64-bit. |
| 105 | + // Since 2^29 < 1,000,000,000 = 0x3B9ACA00 < 2^30, Remainder should < 2^(64-30) = 2^34, |
| 106 | + // i.e. highest bit set in Remainder should <= 33. |
| 107 | + // |
| 108 | + Shift = MAX (0, HighBitSet64 (Remainder) - 33); |
| 109 | + Remainder = RShiftU64 (Remainder, (UINTN)Shift); |
| 110 | + Frequency = RShiftU64 (Frequency, (UINTN)Shift); |
| 111 | + NanoSeconds += DivU64x64Remainder (MultU64x32 (Remainder, 1000000000u), Frequency, NULL); |
| 112 | +
|
| 113 | + return NanoSeconds; |
| 114 | +} |
| 115 | +*/ |
| 116 | + |
| 117 | +func CpuidCoreClockCalculateTscFrequency() uint64 { |
| 118 | + var TscFrequency uint64 |
| 119 | + var CoreXtalFrequency uint64 |
| 120 | + var RegEax uint32 |
| 121 | + var RegEbx uint32 |
| 122 | + var RegEcx uint32 |
| 123 | + |
| 124 | + AsmCpuid(CPUID_TIME_STAMP_COUNTER, &RegEax, &RegEbx, &RegEcx, nil) |
| 125 | + |
| 126 | + // If EAX or EBX returns 0, the XTAL ratio is not enumerated. |
| 127 | + if (RegEax == 0) || (RegEbx == 0) { |
| 128 | + return 0 |
| 129 | + } |
| 130 | + |
| 131 | + // If ECX returns 0, the XTAL frequency is not enumerated. |
| 132 | + // And PcdCpuCoreCrystalClockFrequency defined should base on processor series. |
| 133 | + // |
| 134 | + if RegEcx == 0 { |
| 135 | + // Specifies CPUID Leaf 0x15 Time Stamp Counter and Nominal Core Crystal Clock Frequency. |
| 136 | + // Intel Xeon Processor Scalable Family with CPUID signature 06_55H = 25000000 (25MHz) |
| 137 | + // 6th and 7th generation Intel Core processors and Intel Xeon W Processor Family = 24000000 (24MHz) |
| 138 | + // Intel Atom processors based on Goldmont Microarchitecture with CPUID signature 06_5CH = 19200000 (19.2MHz) |
| 139 | + CoreXtalFrequency = 24000000 |
| 140 | + } else { |
| 141 | + CoreXtalFrequency = uint64(RegEcx) |
| 142 | + } |
| 143 | + |
| 144 | + // Calculate TSC frequency = (ECX, Core Xtal Frequency) * EBX/EAX |
| 145 | + TscFrequency = ((CoreXtalFrequency * uint64(RegEbx)) + (uint64(RegEax) / 2)) / uint64(RegEax) |
| 146 | + return TscFrequency |
| 147 | +} |
0 commit comments