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all: add HiFive1 rev B board with RISC-V architecture
This page has been a big help in adding support for this new chip: https://wiki.osdev.org/HiFive-1_Bare_Bones
1 parent f0eb4ee commit ffa38b1

37 files changed

+485
-74
lines changed

.circleci/config.yml

Lines changed: 15 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -67,7 +67,7 @@ commands:
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- run: go install .
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- run: go test -v
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- run: make gen-device -j4
70-
- run: make smoketest
70+
- run: make smoketest RISCV=0
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- save_cache:
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key: go-cache-{{ checksum "Gopkg.lock" }}-{{ .Environment.CIRCLE_BUILD_NUM }}
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paths:
@@ -100,7 +100,7 @@ commands:
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- llvm-source-linux
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- restore_cache:
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keys:
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- llvm-build-8-linux-v6
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- llvm-build-8-linux-v7
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- run:
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name: "Build LLVM"
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command: |
@@ -118,7 +118,7 @@ commands:
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make llvm-build
119119
fi
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- save_cache:
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key: llvm-build-8-linux-v6
121+
key: llvm-build-8-linux-v7
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paths:
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llvm-build
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- run:
@@ -149,6 +149,11 @@ commands:
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tar -C ~/lib -xf /tmp/tinygo.linux-amd64.tar.gz
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ln -s ~/lib/tinygo/bin/tinygo /go/bin/tinygo
151151
tinygo version
152+
- run:
153+
name: "Download SiFive GNU toolchain"
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command: |
155+
curl -O https://static.dev.sifive.com/dev-tools/riscv64-unknown-elf-gcc-8.2.0-2019.05.3-x86_64-linux-ubuntu14.tar.gz
156+
sudo tar -C /usr/local --strip-components=1 -xf riscv64-unknown-elf-gcc-8.2.0-2019.05.3-x86_64-linux-ubuntu14.tar.gz
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- run: make smoketest
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build-macos:
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steps:
@@ -173,7 +178,7 @@ commands:
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- llvm-project
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- restore_cache:
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keys:
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- llvm-build-8-macos-v5
181+
- llvm-build-8-macos-v6
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- run:
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name: "Build LLVM"
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command: |
@@ -185,7 +190,7 @@ commands:
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make llvm-build
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fi
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- save_cache:
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key: llvm-build-8-macos-v5
193+
key: llvm-build-8-macos-v6
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paths:
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llvm-build
191196
- run:
@@ -209,6 +214,11 @@ commands:
209214
tar -C /usr/local/opt -xf /tmp/tinygo.darwin-amd64.tar.gz
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ln -s /usr/local/opt/tinygo/bin/tinygo /usr/local/bin/tinygo
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tinygo version
217+
- run:
218+
name: "Download SiFive GNU toolchain"
219+
command: |
220+
curl -O https://static.dev.sifive.com/dev-tools/riscv64-unknown-elf-gcc-8.2.0-2019.05.3-x86_64-apple-darwin.tar.gz
221+
sudo tar -C /usr/local --strip-components=1 -xf riscv64-unknown-elf-gcc-8.2.0-2019.05.3-x86_64-apple-darwin.tar.gz
212222
- run: make smoketest AVR=0
213223

214224

.gitignore

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -5,10 +5,12 @@ src/device/avr/*.ld
55
src/device/avr/*.s
66
src/device/nrf/*.go
77
src/device/nrf/*.s
8-
src/device/stm32/*.go
9-
src/device/stm32/*.s
108
src/device/sam/*.go
119
src/device/sam/*.s
10+
src/device/sifive/*.go
11+
src/device/sifive/*.s
12+
src/device/stm32/*.go
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src/device/stm32/*.s
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vendor
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llvm
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llvm-build

.gitmodules

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -9,7 +9,7 @@
99
url = https://github.com/avr-rust/avr-mcu.git
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[submodule "lib/cmsis-svd"]
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path = lib/cmsis-svd
12-
url = https://github.com/posborne/cmsis-svd
12+
url = https://github.com/tinygo-org/cmsis-svd
1313
[submodule "lib/compiler-rt"]
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path = lib/compiler-rt
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url = https://github.com/llvm-mirror/compiler-rt.git

Makefile

Lines changed: 9 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -41,7 +41,7 @@ fmt-check:
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@unformatted=$$(gofmt -l $(FMT_PATHS)); [ -z "$$unformatted" ] && exit 0; echo "Unformatted:"; for fn in $$unformatted; do echo " $$fn"; done; exit 1
4242

4343

44-
gen-device: gen-device-avr gen-device-nrf gen-device-sam gen-device-stm32
44+
gen-device: gen-device-avr gen-device-nrf gen-device-sam gen-device-sifive gen-device-stm32
4545

4646
gen-device-avr:
4747
./tools/gen-device-avr.py lib/avr/packs/atmega src/device/avr/
@@ -56,6 +56,10 @@ gen-device-sam:
5656
./tools/gen-device-svd.py lib/cmsis-svd/data/Atmel/ src/device/sam/ --source=https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
5757
go fmt ./src/device/sam
5858

59+
gen-device-sifive:
60+
./tools/gen-device-svd.py lib/cmsis-svd/data/SiFive-Community/ src/device/sifive/ --source=https://github.com/AdaCore/svd2ada/tree/master/CMSIS-SVD/SiFive-Community
61+
go fmt ./src/device/sifive
62+
5963
gen-device-stm32:
6064
./tools/gen-device-svd.py lib/cmsis-svd/data/STMicro/ src/device/stm32/ --source=https://github.com/posborne/cmsis-svd/tree/master/data/STMicro
6165
go fmt ./src/device/stm32
@@ -69,7 +73,7 @@ llvm-source: llvm-project/README.md
6973
# Configure LLVM.
7074
TINYGO_SOURCE_DIR=$(shell pwd)
7175
$(LLVM_BUILDDIR)/build.ninja: llvm-source
72-
mkdir -p $(LLVM_BUILDDIR); cd $(LLVM_BUILDDIR); cmake -G Ninja $(TINYGO_SOURCE_DIR)/llvm-project/llvm "-DLLVM_TARGETS_TO_BUILD=X86;ARM;AArch64;WebAssembly" "-DLLVM_EXPERIMENTAL_TARGETS_TO_BUILD=AVR" -DCMAKE_BUILD_TYPE=Release -DLLVM_ENABLE_ASSERTIONS=OFF -DLIBCLANG_BUILD_STATIC=ON -DLLVM_ENABLE_TERMINFO=OFF -DLLVM_ENABLE_ZLIB=OFF -DLLVM_ENABLE_PROJECTS="clang;lld" -DLLVM_TOOL_CLANG_TOOLS_EXTRA_BUILD=OFF
76+
mkdir -p $(LLVM_BUILDDIR); cd $(LLVM_BUILDDIR); cmake -G Ninja $(TINYGO_SOURCE_DIR)/llvm-project/llvm "-DLLVM_TARGETS_TO_BUILD=X86;ARM;AArch64;WebAssembly" "-DLLVM_EXPERIMENTAL_TARGETS_TO_BUILD=AVR;RISCV" -DCMAKE_BUILD_TYPE=Release -DLLVM_ENABLE_ASSERTIONS=OFF -DLIBCLANG_BUILD_STATIC=ON -DLLVM_ENABLE_TERMINFO=OFF -DLLVM_ENABLE_ZLIB=OFF -DLLVM_ENABLE_PROJECTS="clang;lld" -DLLVM_TOOL_CLANG_TOOLS_EXTRA_BUILD=OFF
7377

7478
# Build LLVM.
7579
$(LLVM_BUILDDIR): $(LLVM_BUILDDIR)/build.ninja
@@ -123,6 +127,9 @@ smoketest:
123127
ifneq ($(AVR), 0)
124128
tinygo build -size short -o test.elf -target=arduino examples/blinky1
125129
tinygo build -size short -o test.elf -target=digispark examples/blinky1
130+
endif
131+
ifneq ($(RISCV), 0)
132+
tinygo build -size short -o test.elf -target=hifive1b examples/blinky1
126133
endif
127134
tinygo build -o wasm.wasm -target=wasm examples/wasm/export
128135
tinygo build -o wasm.wasm -target=wasm examples/wasm/main

compiler/compiler.go

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -226,7 +226,7 @@ func (c *Compiler) Compile(mainPath string) []error {
226226
return path
227227
} else if path == "syscall" {
228228
for _, tag := range c.BuildTags {
229-
if tag == "avr" || tag == "cortexm" || tag == "darwin" {
229+
if tag == "avr" || tag == "cortexm" || tag == "darwin" || tag == "riscv" {
230230
return path
231231
}
232232
}
@@ -1304,11 +1304,11 @@ func (c *Compiler) parseCall(frame *Frame, instr *ssa.CallCommon) (llvm.Value, e
13041304
if fn := instr.StaticCallee(); fn != nil {
13051305
name := fn.RelString(nil)
13061306
switch {
1307-
case name == "device/arm.ReadRegister":
1308-
return c.emitReadRegister(instr.Args)
1309-
case name == "device/arm.Asm" || name == "device/avr.Asm":
1307+
case name == "device/arm.ReadRegister" || name == "device/riscv.ReadRegister":
1308+
return c.emitReadRegister(name, instr.Args)
1309+
case name == "device/arm.Asm" || name == "device/avr.Asm" || name == "device/riscv.Asm":
13101310
return c.emitAsm(instr.Args)
1311-
case name == "device/arm.AsmFull" || name == "device/avr.AsmFull":
1311+
case name == "device/arm.AsmFull" || name == "device/avr.AsmFull" || name == "device/riscv.AsmFull":
13121312
return c.emitAsmFull(frame, instr)
13131313
case strings.HasPrefix(name, "device/arm.SVCall"):
13141314
return c.emitSVCall(frame, instr.Args)

compiler/gc.go

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -18,7 +18,7 @@ func (c *Compiler) needsStackObjects() bool {
1818
return false
1919
}
2020
for _, tag := range c.BuildTags {
21-
if tag == "cortexm" {
21+
if tag == "cortexm" || tag == "tinygo.riscv" {
2222
return false
2323
}
2424
}

compiler/inlineasm.go

Lines changed: 11 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -18,10 +18,19 @@ import (
1818
// func ReadRegister(name string) uintptr
1919
//
2020
// The register name must be a constant, for example "sp".
21-
func (c *Compiler) emitReadRegister(args []ssa.Value) (llvm.Value, error) {
21+
func (c *Compiler) emitReadRegister(name string, args []ssa.Value) (llvm.Value, error) {
2222
fnType := llvm.FunctionType(c.uintptrType, []llvm.Type{}, false)
2323
regname := constant.StringVal(args[0].(*ssa.Const).Value)
24-
target := llvm.InlineAsm(fnType, "mov $0, "+regname, "=r", false, false, 0)
24+
var asm string
25+
switch name {
26+
case "device/arm.ReadRegister":
27+
asm = "mov $0, " + regname
28+
case "device/riscv.ReadRegister":
29+
asm = "mv $0, " + regname
30+
default:
31+
panic("unknown architecture")
32+
}
33+
target := llvm.InlineAsm(fnType, asm, "=r", false, false, 0)
2534
return c.builder.CreateCall(target, nil, ""), nil
2635
}
2736

src/device/riscv/riscv.go

Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,10 @@
1+
package riscv
2+
3+
// Run the given assembly code. The code will be marked as having side effects,
4+
// as it doesn't produce output and thus would normally be eliminated by the
5+
// optimizer.
6+
func Asm(asm string)
7+
8+
// ReadRegister returns the contents of the specified register. The register
9+
// must be a processor register, reachable with the "mov" instruction.
10+
func ReadRegister(name string) uintptr

src/device/riscv/start.S

Lines changed: 13 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,13 @@
1+
.section .init
2+
.global _start
3+
.type _start,@function
4+
5+
_start:
6+
// Workaround for missing support of the la pseudo-instruction in Clang 8:
7+
// https://reviews.llvm.org/D55325
8+
lui sp, %hi(_stack_top)
9+
addi sp, sp, %lo(_stack_top)
10+
// see https://gnu-mcu-eclipse.github.io/arch/riscv/programmer/#the-gp-global-pointer-register
11+
lui gp, %hi(__global_pointer$)
12+
addi gp, gp, %lo(__global_pointer$)
13+
call main

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