LDO and rp2040 IIC pins #33
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I need to watch that board much more often! I took part in hardware discussions, but did not design the board, so cannot tell for sure, but here is what I understood of the discussions:
As far as I remember, a better LDO, with better power dissipation but also better efficiency was considered, and the solution was to allow these to become external and provide cost-optimized ones along with the default board, to allow some upgrade path for power too.
Good practice, maybe it would fit around the switch.
There is not really any dedicated SDA/SCL per-se: it is possible to use any MCU and FPGA pin, but if short on pins and wanting more and not needing so many LEDs, it is possible to turn these pins into I²C ones. |
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You need to check how much dissipation the LDO can handle. Might adds thermal noise to its 3v3 output. The DFN/QFN versions of the voltage regulator have better dissipation characteristics. And would help against sot23.
Many boards use the DFN version of LDO (Teensy 3.x, 4.x and TinyFPGA BX; icebreaker-bitsy; FOMU, Raspberry pi pico)
Look at these regulators:
https://www.digikey.com/en/products/detail/onsemi/NCP177AMX180TCG/5848192
https://www.digikey.com/en/products/detail/onsemi/NCP177AMX330TCG/5848193
I suggest adding a debounce circuit on the FPGA button (Sw2), this saves some LUTs and DFFs used to design a filter.
I don't understand why you connect the SDA/SCL (pins 15 and 16) of the rp2040 chip to LED_G and LED_R.
it will surely affect the IIC communication. The IIC pins must remain free and the user can add external pull-up resistors. Or add 4k7 resistors like on the Arduino RP2040 board with the ability to disconnect them.
Hope this can help in any way.
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