pico-ice RP2040 SPI1 pin assignments?

[frohro]

I was a bit surprised when I found that ICE_SI was connected to GPIO8 and ICE_SO was connected to GPIO11. I expected it to be the other way around. I noted the pico2-ice seems to have done it the way I was expecting. It means I have to use the PIO instead of the built-in SPI1 for the pico-ice when loading CRAM. Why was this done?

[josuah]

This is a bit tricky, but the Lattice FPGA CRAM programming interface is incompatible with the flash programming interface from the input point of view.

Looking at things from the RP2040/RP2350 point of view:

• The FPGA flash will be accessible with flash.pico and flash.poci in correct pinout.
• The FPGA CRAM will be accessible with ice40.pico and ice40.poci in opposite order
• There is nothing we can do to swap the ice40 SPI pins: there has to be this opposition on the RP2040/RP2350 because of how the iCE40 pins are mapped in the two modes.

Note:

• when the iCE40 is programmed from the flafh, the iCE40 will be controller and the flash the peripheral. This means the RP2040/RP2350 will be controller to access the flash in peripheral mode.
• when the iCE is programmed in CRAM mode, the iCE40 will be the peripheral, and the RP2040/RP2350 will be the controller, but the iCE40 keeps its input as input, and output as output... It should have been swapping so that the pin that sends the data (output) now becomes a pin that receives the data (input)... but no it does not support that, so the RP2040/RP2350 needs to swap its pins instead, so that it can send data to a pin that can receive data.

[frohro]

Thanks! I get it now.

[josuah]

It took me a while to grasp it! ^_^'