@@ -83,33 +83,33 @@ static int uart_silabs_eusart_err_check(const struct device *dev)
8383static int uart_silabs_eusart_fifo_fill (const struct device * dev , const uint8_t * tx_data , int len )
8484{
8585 const struct uart_silabs_eusart_config * config = dev -> config ;
86- int num_tx = 0 ;
86+ int i = 0 ;
8787
88- while ((len - num_tx > 0 ) && (EUSART_StatusGet (config -> eusart ) & EUSART_STATUS_TXFL )) {
89- config -> eusart -> TXDATA = (uint32_t )tx_data [num_tx ++ ];
88+ while ((i < len ) && (EUSART_StatusGet (config -> eusart ) & EUSART_STATUS_TXFL )) {
89+ config -> eusart -> TXDATA = (uint32_t )tx_data [i ++ ];
9090 }
9191
9292 if (!(EUSART_StatusGet (config -> eusart ) & EUSART_STATUS_TXFL )) {
9393 EUSART_IntClear (config -> eusart , EUSART_IF_TXFL );
9494 }
9595
96- return num_tx ;
96+ return i ;
9797}
9898
9999static int uart_silabs_eusart_fifo_read (const struct device * dev , uint8_t * rx_data , const int len )
100100{
101101 const struct uart_silabs_eusart_config * config = dev -> config ;
102- int num_rx = 0 ;
102+ int i = 0 ;
103103
104- while ((len - num_rx > 0 ) && (EUSART_StatusGet (config -> eusart ) & EUSART_STATUS_RXFL )) {
105- rx_data [num_rx ++ ] = (uint8_t )config -> eusart -> RXDATA ;
104+ while ((i < len ) && (EUSART_StatusGet (config -> eusart ) & EUSART_STATUS_RXFL )) {
105+ rx_data [i ++ ] = (uint8_t )config -> eusart -> RXDATA ;
106106 }
107107
108108 if (!(EUSART_StatusGet (config -> eusart ) & EUSART_STATUS_RXFL )) {
109109 EUSART_IntClear (config -> eusart , EUSART_IF_RXFL );
110110 }
111111
112- return num_rx ;
112+ return i ;
113113}
114114
115115static void uart_silabs_eusart_irq_tx_enable (const struct device * dev )
@@ -135,7 +135,7 @@ static int uart_silabs_eusart_irq_tx_complete(const struct device *dev)
135135
136136 EUSART_IntClear (config -> eusart , EUSART_IF_TXC );
137137
138- return (flags & EUSART_IF_TXC ) != 0 ;
138+ return !! (flags & EUSART_IF_TXC );
139139}
140140
141141static int uart_silabs_eusart_irq_tx_ready (const struct device * dev )
@@ -215,7 +215,7 @@ static void uart_silabs_eusart_isr(const struct device *dev)
215215}
216216#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
217217
218- static inline EUSART_Parity_TypeDef uart_silabs_eusart_cfg2ll_parity (enum uart_config_parity parity )
218+ static EUSART_Parity_TypeDef uart_silabs_eusart_cfg2ll_parity (enum uart_config_parity parity )
219219{
220220 switch (parity ) {
221221 case UART_CFG_PARITY_ODD :
@@ -241,8 +241,7 @@ static inline enum uart_config_parity uart_silabs_eusart_ll2cfg_parity(EUSART_Pa
241241 }
242242}
243243
244- static inline EUSART_Stopbits_TypeDef
245- uart_silabs_eusart_cfg2ll_stopbits (enum uart_config_stop_bits sb )
244+ static EUSART_Stopbits_TypeDef uart_silabs_eusart_cfg2ll_stopbits (enum uart_config_stop_bits sb )
246245{
247246 switch (sb ) {
248247 case UART_CFG_STOP_BITS_0_5 :
@@ -275,8 +274,8 @@ uart_silabs_eusart_ll2cfg_stopbits(EUSART_Stopbits_TypeDef sb)
275274 }
276275}
277276
278- static inline EUSART_Databits_TypeDef
279- uart_silabs_eusart_cfg2ll_databits ( enum uart_config_data_bits db , enum uart_config_parity p )
277+ static EUSART_Databits_TypeDef uart_silabs_eusart_cfg2ll_databits ( enum uart_config_data_bits db ,
278+ enum uart_config_parity p )
280279{
281280 switch (db ) {
282281 case UART_CFG_DATA_BITS_7 :
@@ -324,14 +323,7 @@ uart_silabs_eusart_ll2cfg_databits(EUSART_Databits_TypeDef db, EUSART_Parity_Typ
324323 }
325324}
326325
327- /**
328- * @brief Get LL hardware flow control define from
329- * Zephyr hardware flow control option.
330- * @note Supports only UART_CFG_FLOW_CTRL_RTS_CTS and UART_CFG_FLOW_CTRL_RS485.
331- * @param fc: Zephyr hardware flow control option.
332- * @retval eusartHwFlowControlCtsAndRts, or eusartHwFlowControlNone.
333- */
334- static inline EUSART_HwFlowControl_TypeDef
326+ static EUSART_HwFlowControl_TypeDef
335327uart_silabs_eusart_cfg2ll_hwctrl (enum uart_config_flow_control fc )
336328{
337329 if (fc == UART_CFG_FLOW_CTRL_RTS_CTS ) {
@@ -341,13 +333,6 @@ uart_silabs_eusart_cfg2ll_hwctrl(enum uart_config_flow_control fc)
341333 return eusartHwFlowControlNone ;
342334}
343335
344- /**
345- * @brief Get Zephyr hardware flow control option from
346- * LL hardware flow control define.
347- * @note Supports only eusartHwFlowControlCtsAndRts.
348- * @param fc: LL hardware flow control definition.
349- * @retval UART_CFG_FLOW_CTRL_RTS_CTS, or UART_CFG_FLOW_CTRL_NONE.
350- */
351336static inline enum uart_config_flow_control
352337uart_silabs_eusart_ll2cfg_hwctrl (EUSART_HwFlowControl_TypeDef fc )
353338{
@@ -382,12 +367,6 @@ static void uart_silabs_eusart_configure_peripheral(const struct device *dev, bo
382367 }
383368}
384369
385- /**
386- * @brief Main initializer for UART
387- *
388- * @param dev UART device to be initialized
389- * @return int 0
390- */
391370static int uart_silabs_eusart_init (const struct device * dev )
392371{
393372 int err ;
@@ -421,11 +400,9 @@ static int uart_silabs_eusart_pm_action(const struct device *dev, enum pm_device
421400
422401 switch (action ) {
423402 case PM_DEVICE_ACTION_SUSPEND :
424- #ifdef EUSART_STATUS_TXIDLE
425403 /* Wait for TX FIFO to flush before suspending */
426404 while (!(EUSART_StatusGet (config -> eusart ) & EUSART_STATUS_TXIDLE )) {
427405 }
428- #endif
429406 break ;
430407
431408 case PM_DEVICE_ACTION_RESUME :
@@ -462,8 +439,8 @@ static DEVICE_API(uart, uart_silabs_eusart_driver_api) = {
462439};
463440
464441#ifdef CONFIG_UART_INTERRUPT_DRIVEN
465- #define UART_IRQ_HANDLER_FUNC (idx ) .irq_config_func = uart_silabs_eusart_config_func_##idx,
466- #define UART_IRQ_HANDLER (idx ) \
442+ #define SILABS_EUSART_IRQ_HANDLER_FUNC (idx ) .irq_config_func = uart_silabs_eusart_config_func_##idx,
443+ #define SILABS_EUSART_IRQ_HANDLER (idx ) \
467444 static void uart_silabs_eusart_config_func_##idx(const struct device *dev) \
468445 { \
469446 IRQ_CONNECT(DT_INST_IRQ_BY_NAME(idx, rx, irq), \
@@ -477,20 +454,21 @@ static DEVICE_API(uart, uart_silabs_eusart_driver_api) = {
477454 irq_enable(DT_INST_IRQ_BY_NAME(idx, tx, irq)); \
478455 }
479456#else
480- #define UART_IRQ_HANDLER_FUNC (idx )
481- #define UART_IRQ_HANDLER (idx )
457+ #define SILABS_EUSART_IRQ_HANDLER_FUNC (idx )
458+ #define SILABS_EUSART_IRQ_HANDLER (idx )
482459#endif
483460
484- #define UART_INIT (idx ) \
485- UART_IRQ_HANDLER (idx) \
461+ #define SILABS_EUSART_INIT (idx ) \
462+ SILABS_EUSART_IRQ_HANDLER (idx); \
486463 PINCTRL_DT_INST_DEFINE(idx); \
464+ PM_DEVICE_DT_INST_DEFINE(idx, uart_silabs_eusart_pm_action); \
487465 \
488466 static const struct uart_silabs_eusart_config uart_silabs_eusart_cfg_##idx = { \
489467 .eusart = (EUSART_TypeDef *)DT_INST_REG_ADDR(idx), \
490468 .pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(idx), \
491469 .clock_dev = DEVICE_DT_GET(DT_INST_CLOCKS_CTLR(idx)), \
492470 .clock_cfg = SILABS_DT_INST_CLOCK_CFG(idx), \
493- UART_IRQ_HANDLER_FUNC (idx) \
471+ SILABS_EUSART_IRQ_HANDLER_FUNC (idx) \
494472 }; \
495473 \
496474 static struct uart_silabs_eusart_data uart_silabs_eusart_data_##idx = { \
@@ -505,11 +483,9 @@ static DEVICE_API(uart, uart_silabs_eusart_driver_api) = {
505483 }, \
506484 }; \
507485 \
508- PM_DEVICE_DT_INST_DEFINE(idx, uart_silabs_eusart_pm_action); \
509- \
510486 DEVICE_DT_INST_DEFINE(idx, uart_silabs_eusart_init, PM_DEVICE_DT_INST_GET(idx), \
511487 &uart_silabs_eusart_data_##idx, &uart_silabs_eusart_cfg_##idx, \
512488 PRE_KERNEL_1, CONFIG_SERIAL_INIT_PRIORITY, \
513489 &uart_silabs_eusart_driver_api);
514490
515- DT_INST_FOREACH_STATUS_OKAY (UART_INIT )
491+ DT_INST_FOREACH_STATUS_OKAY (SILABS_EUSART_INIT )
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