drivers: pinctrl: Add support for RZ/T2M

This is the initial commit to support pinctrl driver for Renesas RZ/T2M
Corrected space in the comment.

Signed-off-by: Hieu Nguyen <[email protected]>
Signed-off-by: Nhut Nguyen <[email protected]>
Signed-off-by: Binh Nguyen <[email protected]>

Author: Hieu Nguyen

boards/renesas/rzt2m_rsk/rzt2m_rsk-pinctrl.dtsi

@@ -0,0 +1,23 @@
+/*
+ * Copyright (c) 2025 Renesas Electronics Corporation
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <zephyr/dt-bindings/gpio/gpio.h>
+#include <zephyr/dt-bindings/pinctrl/renesas/pinctrl-rzt-common.h>
+
+&pinctrl {
+	/omit-if-no-ref/ sci0_default: sci0_default {
+		sci0-pinmux {
+			pinmux = <RZT_PINMUX(PORT_16, 5, 1)>, /* TXD */
+				 <RZT_PINMUX(PORT_16, 6, 2)>; /* RXD */
+		};
+	};
+
+	/omit-if-no-ref/ irq2_default: irq2_default{
+		irq2-pinmux{
+			pinmux = <RZT_PINMUX(PORT_10, 5, 0)>;
+			input-enable;
+		};
+	};
+};

dts/arm/renesas/rz/rzt/r9a07g075.dtsi

@@ -94,5 +94,10 @@
 				};
 			};
 		};
+
+		pinctrl: pinctrl@800a0000 {
+			compatible = "renesas,rzt-pinctrl";
+			reg = <0x800a0000 0x1000 0x81030c00 0x1000>;
+		};
 	};
 };

dts/bindings/pinctrl/renesas,rzt-pinctrl.yaml

@@ -2,7 +2,9 @@
 # SPDX-License-Identifier: Apache-2.0
 
 description: |
-    The Renesas RZ/T2L pin controller is a node responsible for controlling
+    Renesas RZ/T pin controller
+
+    The Renesas RZ/T pin controller is a node responsible for controlling
     pin function selection and pin properties, such as routing the TX and RX of UART0
     to pin 5 and pin 6 of port 16.
 

include/zephyr/dt-bindings/pinctrl/renesas/pinctrl-rzg-common.h

@@ -101,4 +101,4 @@
 
 #define RZG_FILTER_SET(filnum, filclksel) (((filnum) & 0x3) << 0x2) | (filclksel & 0x3)
 
-#endif /*ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_RENESAS_PINCTRL_RZG_COMMON_H_*/
+#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_RENESAS_PINCTRL_RZG_COMMON_H_ */

include/zephyr/dt-bindings/pinctrl/renesas/pinctrl-rzt-common.h

@@ -42,4 +42,4 @@
  */
 #define RZT_PINMUX(port, pin, func) (port | pin | (func << 4))
 
-#endif /*ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_RENESAS_PINCTRL_RZT_COMMON_H_*/
+#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_RENESAS_PINCTRL_RZT_COMMON_H_ */

soc/renesas/rz/common/pinctrl_rzg.h

@@ -101,4 +101,4 @@ typedef struct pinctrl_soc_pin_t {
 #ifdef __cplusplus
 }
 #endif
-#endif /*ZEPHYR_SOC_RENESAS_RZ_COMMON_PINCTRL_RZG_H_*/
+#endif /* ZEPHYR_SOC_RENESAS_RZ_COMMON_PINCTRL_RZG_H_ */

soc/renesas/rz/common/pinctrl_rzt.h

@@ -65,4 +65,4 @@ typedef struct pinctrl_soc_pin_t {
 }
 #endif
 
-#endif /*ZEPHYR_SOC_RENESAS_RZ_COMMON_PINCTRL_RZT_H_*/
+#endif /* ZEPHYR_SOC_RENESAS_RZ_COMMON_PINCTRL_RZT_H_ */

soc/renesas/rz/rzt2m/pinctrl_soc.h

@@ -0,0 +1,13 @@
+/*
+ * Copyright (c) 2023 Antmicro <www.antmicro.com>
+ * Copyright (c) 2025 Renesas Electronics Corporation
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef ZEPHYR_SOC_RENESAS_RZ_RZT2M_PINCTRL_SOC_H_
+#define ZEPHYR_SOC_RENESAS_RZ_RZT2M_PINCTRL_SOC_H_
+
+#include <pinctrl_rzt.h>
+
+#endif /* ZEPHYR_SOC_RENESAS_RZ_RZT2M_PINCTRL_SOC_H_ */