WIP: Add audio output on stm32h7s78-dk

Signed-off-by: Titouan Christophe <[email protected]>

Author: titouanc

boards/st/stm32h7s78_dk/stm32h7s78_dk.dts

@@ -8,6 +8,7 @@
 #include <st/h7rs/stm32h7s7X8.dtsi>
 #include <st/h7/stm32h7s7l8hxh-pinctrl.dtsi>
 #include "arduino_r3_connector.dtsi"
+#include <zephyr/dt-bindings/clock/stm32h7rs_clock.h>
 #include <zephyr/dt-bindings/input/input-event-codes.h>
 
 / {
@@ -107,6 +108,18 @@
 	status = "okay";
 };
 
+&pll2 {
+	div-m = <25>;
+	mul-n = <147>;
+	div-p = <2>;
+	div-q = <25>; /* Tuned for 44.1kHz 16b with MCK on I2S6 */
+	div-r = <2>;
+	div-s = <2>;
+	div-t = <2>;
+	clocks = <&clk_hse>;
+	status = "okay";
+};
+
 &rcc {
 	clocks = <&pll>;
 	clock-frequency = <DT_FREQ_M(250)>;
@@ -192,6 +205,24 @@
 &i2c1 {
 	pinctrl-0 = <&i2c1_scl_pb6 &i2c1_sda_pb9>;
 	pinctrl-names = "default";
+	status = "okay";
+
+	audio_codec: wm8904g@1a {
+		compatible = "wolfson,wm8904";
+		reg = <0x1a>;
+		clocks = <&rcc STM32_SRC_PLL2_Q 0>;
+		clock-names = "mclk";
+	};
+};
+
+&i2s6 {
+	pinctrl-0 = <&i2s6_mck_pa3 &i2s6_ws_pa4 &i2s6_ck_pa5 &spi6_mosi_pb5 &spi6_miso_pg12>;
+	pinctrl-names = "default";
+	status = "okay";
+};
+
+&gpdma1 {
+	status = "okay";
 };
 
 &xspi1 {

drivers/audio/wm8904.c

@@ -22,7 +22,7 @@ struct wm8904_driver_config {
 	struct i2c_dt_spec i2c;
 	int clock_source;
 	const struct device *mclk_dev;
-	clock_control_subsys_t mclk_name;
+	clock_control_subsys_t mclk_ctrl;
 };
 
 #define DEV_CFG(dev) ((const struct wm8904_driver_config *const)dev->config)
@@ -489,13 +489,13 @@ static int wm8904_configure(const struct device *dev, struct audio_codec_cfg *cf
 			  (uint16_t)(dev_cfg->clock_source));
 
 	if (dev_cfg->clock_source == 0) {
-		int err = clock_control_on(dev_cfg->mclk_dev, dev_cfg->mclk_name);
+		int err = clock_control_on(dev_cfg->mclk_dev, dev_cfg->mclk_ctrl);
 
 		if (err < 0) {
 			LOG_ERR("MCLK clock source enable fail: %d", err);
 		}
 
-		err = clock_control_get_rate(dev_cfg->mclk_dev, dev_cfg->mclk_name,
+		err = clock_control_get_rate(dev_cfg->mclk_dev, dev_cfg->mclk_ctrl,
 					     &cfg->mclk_freq);
 		if (err < 0) {
 			LOG_ERR("MCLK clock source freq acquire fail: %d", err);
@@ -673,7 +673,7 @@ static const struct audio_codec_api wm8904_driver_api = {
 		.i2c = I2C_DT_SPEC_INST_GET(n),                                                    \
 		.clock_source = DT_INST_PROP_OR(n, clk_source, 0),                                 \
 		.mclk_dev = DEVICE_DT_GET(DT_INST_CLOCKS_CTLR_BY_NAME(n, mclk)),                   \
-		.mclk_name = (clock_control_subsys_t)DT_INST_CLOCKS_CELL_BY_NAME(n, mclk, name)};  \
+		.mclk_ctrl = (clock_control_subsys_t)DT_INST_CLOCKS_CELL_BY_NAME(n, mclk, bus)};  \
                                                                                                    \
 	DEVICE_DT_INST_DEFINE(n, NULL, NULL, NULL, &wm8904_device_config_##n,        \
 			      POST_KERNEL, CONFIG_AUDIO_CODEC_INIT_PRIORITY, &wm8904_driver_api);

dts/arm/st/h7rs/stm32h7rs.dtsi

@@ -503,6 +503,20 @@
 			status = "disabled";
 		};
 
+		i2s6: i2s@58001400 {
+			compatible = "st,stm32h7-i2s", "st,stm32-i2s";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x58001400 0x400>;
+			clocks = <&rcc STM32_CLOCK(APB4, 5)>,
+				 <&rcc STM32_SRC_PLL2_Q SPI6_SEL(1)>;
+			interrupts = <63 3>;
+			dmas = <&gpdma1 0 62 (STM32_DMA_PERIPH_TX | STM32_DMA_16BITS | STM32_DMA_PRIORITY_HIGH)
+				&gpdma1 1 61 (STM32_DMA_PERIPH_RX | STM32_DMA_16BITS | STM32_DMA_PRIORITY_HIGH)>;
+			dma-names = "tx", "rx";
+			status = "disabled";
+		};
+
 		fdcan1: can@4000a000 {
 			compatible = "st,stm32-fdcan";
 			reg = <0x4000a000 0x400>, <0x4000ac00 0x350>;

samples/drivers/i2s/i2s_codec/boards/stm32h7s78_dk.conf

@@ -0,0 +1,4 @@
+# Copyright 2025 Titouan Christophe
+# SPDX-License-Identifier: Apache-2.0
+
+CONFIG_SAMPLE_FREQ=5512

samples/drivers/i2s/i2s_codec/boards/stm32h7s78_dk.overlay

@@ -0,0 +1,10 @@
+/*
+ * Copyright (c) 2025 Titouan Christophe
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/ {
+	aliases {
+		i2s-codec-tx = &i2s6;
+	};
+};