@@ -190,7 +190,9 @@ static XSPI_RegularCmdTypeDef xspi_prepare_cmd(const uint8_t transfer_mode,
190190 .DQSMode = (transfer_rate == XSPI_DTR_TRANSFER )
191191 ? HAL_XSPI_DQS_ENABLE
192192 : HAL_XSPI_DQS_DISABLE ,
193+ #if CONFIG_STM32_XSPI_HAS_SIOO
193194 .SIOOMode = HAL_XSPI_SIOO_INST_EVERY_CMD ,
195+ #endif
194196 };
195197
196198 switch (transfer_mode ) {
@@ -773,7 +775,9 @@ static int stm32_xspi_mem_reset(const struct device *dev)
773775 .DataLength = HAL_XSPI_DATA_NONE ,
774776 .DummyCycles = 0U ,
775777 .DQSMode = HAL_XSPI_DQS_DISABLE ,
778+ #if CONFIG_STM32_XSPI_HAS_SIOO
776779 .SIOOMode = HAL_XSPI_SIOO_INST_EVERY_CMD ,
780+ #endif
777781 };
778782
779783 /* Reset enable in SPI mode and STR transfer mode */
@@ -1021,7 +1025,9 @@ static int flash_stm32_xspi_erase(const struct device *dev, off_t addr,
10211025 .DataMode = HAL_XSPI_DATA_NONE ,
10221026 .DummyCycles = 0U ,
10231027 .DQSMode = HAL_XSPI_DQS_DISABLE ,
1028+ #if CONFIG_STM32_XSPI_HAS_SIOO
10241029 .SIOOMode = HAL_XSPI_SIOO_INST_EVERY_CMD ,
1030+ #endif
10251031 };
10261032
10271033 if (stm32_xspi_mem_ready (dev ,
@@ -2121,11 +2127,13 @@ static int flash_stm32_xspi_init(const struct device *dev)
21212127 } else {
21222128
21232129 }
2130+ #if CONFIG_STM32_XSPI_HAS_DLYB
21242131#if STM32_XSPI_DLYB_BYPASSED
21252132 dev_data -> hxspi .Init .DelayBlockBypass = HAL_XSPI_DELAY_BLOCK_BYPASS ;
21262133#else
21272134 dev_data -> hxspi .Init .DelayBlockBypass = HAL_XSPI_DELAY_BLOCK_ON ;
21282135#endif /* STM32_XSPI_DLYB_BYPASSED */
2136+ #endif
21292137
21302138
21312139 if (HAL_XSPI_Init (& dev_data -> hxspi ) != HAL_OK ) {
@@ -2155,6 +2163,7 @@ static int flash_stm32_xspi_init(const struct device *dev)
21552163
21562164#endif /* XSPIM */
21572165
2166+ #if CONFIG_STM32_XSPI_HAS_DLYB
21582167#if defined(DLYB_XSPI1 ) || defined(DLYB_XSPI2 ) || defined(DLYB_OCTOSPI1 ) || defined(DLYB_OCTOSPI2 )
21592168 /* XSPI delay block init Function */
21602169 HAL_XSPI_DLYB_CfgTypeDef xspi_delay_block_cfg = {0 };
@@ -2170,6 +2179,7 @@ static int flash_stm32_xspi_init(const struct device *dev)
21702179
21712180 LOG_DBG ("Delay Block Init" );
21722181#endif /* DLYB_ */
2182+ #endif
21732183
21742184#if STM32_XSPI_USE_DMA
21752185 /* Configure and enable the DMA channels after XSPI config */
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