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one liner if and else support #61

@toby-bro

Description

@toby-bro
    always_ff @(posedge clkin_data[32], negedge celloutsig_1_19z)
        if (!celloutsig_1_19z) _12_ <= 12'h000;
        else _12_ <= { celloutsig_0_1z[12:4], celloutsig_0_4z, celloutsig_0_20z, celloutsig_0_14z };

Are detected as injectable

        if (!celloutsig_1_19z) _12_ <= 12'h000;
        // BEGIN: cast_select_demo_ts1752533172416
        logic [7:0] internal_ts1752533172416;
        always_comb begin
            internal_ts1752533172416 = inj_in_data_1752533172416_479;
            inj_out_bits_1752533172416_535 = internal_ts1752533172416[3 -: 2];
        end
        // END: cast_select_demo_ts1752533172416
        // BEGIN: ModCompareVec_ts1752533172418
        assign inj_eq_1752533172418_487 = (inj_v1_1752533172418_886 == inj_v2_1752533172418_692);
        // BEGIN: BitwiseOperations_ts1752533172419
        assign inj_result_and_1752533172419_124 = inj_a_1752533172419_104 & inj_in_data_1752533172416_479;
        assign inj_result_or_1752533172419_144 = inj_a_1752533172419_104 | inj_c_1752533172419_303;
        assign inj_result_xor_1752533172419_965 = inj_in_data_1752533172416_479 ^ inj_c_1752533172419_303;
        // END: BitwiseOperations_ts1752533172419

        // END: ModCompareVec_ts1752533172418


        casez_xz casez_xz_inst_1752533172421_1688 (
            .in_val(inj_in_val_1752533172420_766),
            .out_res(inj_out_res_1752533172421_248)
        );
        else _12_ <= { celloutsig_0_1z[12:4], celloutsig_0_4z, celloutsig_0_20z, celloutsig_0_14z };

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