Merge #2299

2299: Add CSR support for 64 Bit RISC-V r=hudson-ayers a=bradjc

### Pull Request Overview

Adaptation of #2041.

This pull request takes only the CSR updates from #2041 so that the CSR code can be compiled for both 32 bit and 64 bit RISC-V. This is mainly just converting `u32` -> `usize`, and then adding arch `cfg`s where the 32 bit and 64 bit architectures don't quite match.

I believe this is the non-controversial changes from #2041, and is a step towards supporting a 64 bit RISC-V platform. The other changes needed to fully support rv64 involve changing the low-level assembly since there is no "register size load/store" in RISC-V, and updating the PMP code. I think we need to come up with some strategy to support full rv64 without hopefully duplicating a lot of very delicate code.

Also, yes, it pains me to add so many `cfg` statements. However, they are all based on the architecture as specified by the RISC-V spec, and not part of the software architecture in Tock. So they should be reasonably well documented, and any confusion can be resolved by referring to the RISC-V spec.


### Testing Strategy

I tried the arty-e21 board and it still works.


### TODO or Help Wanted

n/a


### Documentation Updated

- [x] Updated the relevant files in `/docs`, or no updates are required.

I did a grep in the docs and I didn't see anywhere we talked about CSR sizes.

### Formatting

- [x] Ran `make prepush`.

Sidenote: enabling automatic rustfmt in your text editor is absolutely amazing and you should absolutely do it.


Co-authored-by: Brad Campbell <[email protected]>
Co-authored-by: Sean Anderson <[email protected]>

Author: 3 people