Skip to content

Commit d699df2

Browse files
nordic-seglnordic-piks
nordic-segl
authored and
nordic-piks
committed
tests: subsys: event_manager_proxy: Enable test on more targets
Add overlays required to run the test on: - nrf54H20, - nRF54L15, - nRF54LM20A, - nRF54LV10A. Signed-off-by: Sebastian Głąb <[email protected]>
1 parent 6d3a500 commit d699df2

13 files changed

+403
-15
lines changed

‎tests/subsys/event_manager_proxy/Kconfig‎

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -12,8 +12,6 @@ menu "Event manager proxy test settings"
1212

1313
config APP_INCLUDE_REMOTE_IMAGE
1414
bool "Include remote image as sub image"
15-
depends on SOC_NRF5340_CPUAPP
16-
default y if (BOARD_NRF5340DK_NRF5340_CPUAPP || BOARD_NRF5340DK_NRF5340_CPUAPP_NS)
1715
select PARTITION_MANAGER_ENABLED if SOC_NRF5340_CPUAPP
1816

1917
config APP_SYSTEM_INIT_PRIO

‎tests/subsys/event_manager_proxy/Kconfig.sysbuild‎

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -9,3 +9,7 @@ source "share/sysbuild/Kconfig"
99
config REMOTE_BOARD
1010
string "The board used for remote target"
1111
default "nrf5340dk/nrf5340/cpunet" if BOARD_NRF5340DK
12+
default "nrf54h20dk/nrf54h20/cpuppr" if BOARD_NRF54H20DK_NRF54H20_CPUAPP
13+
default "nrf54l15dk/nrf54l15/cpuflpr" if BOARD_NRF54L15DK_NRF54L15_CPUAPP
14+
default "nrf54lm20pdk/nrf54lm20a/cpuflpr" if BOARD_NRF54LM20PDK_NRF54LM20A_CPUAPP
15+
default "nrf54lv10dk/nrf54lv10a/cpuflpr" if BOARD_NRF54LV10DK_NRF54LV10A_CPUAPP

‎tests/subsys/event_manager_proxy/boards/nrf54h20dk_nrf54h20_cpuapp_icmsg.overlay‎

Lines changed: 26 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,26 @@
1+
/*
2+
* Copyright (c) 2025 Nordic Semiconductor ASA
3+
*
4+
* SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
5+
*/
6+
7+
/* Replace default ipc0 instance */
8+
/delete-node/ &ipc0;
9+
10+
/* Enabled nodes required by IPC
11+
* Mbox for PPR target, one for each side and one IPC instance
12+
*/
13+
14+
&cpuppr_vevif {
15+
status = "okay";
16+
};
17+
18+
ipc0: &cpuapp_cpuppr_ipc {
19+
status = "okay";
20+
};
21+
22+
/ {
23+
chosen {
24+
/delete-property/ zephyr,bt-hci;
25+
};
26+
};

‎tests/subsys/event_manager_proxy/boards/nrf54l15dk_nrf54l15_cpuapp_icmsg.overlay‎

Lines changed: 46 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,46 @@
1+
/*
2+
* Copyright (c) 2025 Nordic Semiconductor ASA
3+
*
4+
* SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
5+
*/
6+
7+
/ {
8+
chosen {
9+
/delete-property/ zephyr,bt-hci;
10+
};
11+
12+
soc {
13+
reserved-memory {
14+
#address-cells = <1>;
15+
#size-cells = <1>;
16+
17+
sram_rx: memory@20018000 {
18+
reg = <0x20018000 0x8000>;
19+
};
20+
21+
sram_tx: memory@20020000 {
22+
reg = <0x20020000 0x8000>;
23+
};
24+
};
25+
};
26+
27+
ipc {
28+
ipc0: ipc0 {
29+
compatible = "zephyr,ipc-icmsg";
30+
dcache-alignment = <32>;
31+
tx-region = <&sram_tx>;
32+
rx-region = <&sram_rx>;
33+
mboxes = <&cpuapp_vevif_rx 20>, <&cpuapp_vevif_tx 21>;
34+
mbox-names = "rx", "tx";
35+
status = "okay";
36+
};
37+
};
38+
};
39+
40+
&cpuapp_vevif_rx {
41+
status = "okay";
42+
};
43+
44+
&cpuapp_vevif_tx {
45+
status = "okay";
46+
};

‎tests/subsys/event_manager_proxy/boards/nrf54lm20pdk_nrf54lm20a_cpuapp_icmsg.overlay‎

Lines changed: 46 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,46 @@
1+
/*
2+
* Copyright (c) 2025 Nordic Semiconductor ASA
3+
*
4+
* SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
5+
*/
6+
7+
/ {
8+
chosen {
9+
/delete-property/ zephyr,bt-hci;
10+
};
11+
12+
soc {
13+
reserved-memory {
14+
#address-cells = <1>;
15+
#size-cells = <1>;
16+
17+
sram_rx: memory@20057c00 {
18+
reg = <0x20057c00 0x8000>;
19+
};
20+
21+
sram_tx: memory@2005fc00 {
22+
reg = <0x2005fc00 0x8000>;
23+
};
24+
};
25+
};
26+
27+
ipc {
28+
ipc0: ipc0 {
29+
compatible = "zephyr,ipc-icmsg";
30+
dcache-alignment = <32>;
31+
tx-region = <&sram_tx>;
32+
rx-region = <&sram_rx>;
33+
mboxes = <&cpuapp_vevif_rx 20>, <&cpuapp_vevif_tx 21>;
34+
mbox-names = "rx", "tx";
35+
status = "okay";
36+
};
37+
};
38+
};
39+
40+
&cpuapp_vevif_rx {
41+
status = "okay";
42+
};
43+
44+
&cpuapp_vevif_tx {
45+
status = "okay";
46+
};

‎tests/subsys/event_manager_proxy/boards/nrf54lv10dk_nrf54lv10a_cpuapp_icmsg.overlay‎

Lines changed: 46 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,46 @@
1+
/*
2+
* Copyright (c) 2025 Nordic Semiconductor ASA
3+
*
4+
* SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
5+
*/
6+
7+
/ {
8+
chosen {
9+
/delete-property/ zephyr,bt-hci;
10+
};
11+
12+
soc {
13+
reserved-memory {
14+
#address-cells = <1>;
15+
#size-cells = <1>;
16+
17+
sram_rx: memory@2000fc00 {
18+
reg = <0x2000fc00 0x8000>;
19+
};
20+
21+
sram_tx: memory@20017c00 {
22+
reg = <0x20017c00 0x8000>;
23+
};
24+
};
25+
};
26+
27+
ipc {
28+
ipc0: ipc0 {
29+
compatible = "zephyr,ipc-icmsg";
30+
dcache-alignment = <32>;
31+
tx-region = <&sram_tx>;
32+
rx-region = <&sram_rx>;
33+
mboxes = <&cpuapp_vevif_rx 20>, <&cpuapp_vevif_tx 21>;
34+
mbox-names = "rx", "tx";
35+
status = "okay";
36+
};
37+
};
38+
};
39+
40+
&cpuapp_vevif_rx {
41+
status = "okay";
42+
};
43+
44+
&cpuapp_vevif_tx {
45+
status = "okay";
46+
};

‎tests/subsys/event_manager_proxy/remote/boards/nrf54h20dk_nrf54h20_cpuppr_icmsg.conf‎

Lines changed: 17 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,17 @@
1+
#
2+
# Copyright (c) 2025 Nordic Semiconductor ASA
3+
#
4+
# SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
5+
#
6+
################################################################################
7+
8+
CONFIG_LOG=y
9+
CONFIG_LOG_MODE_MINIMAL=y
10+
CONFIG_ASSERT=n
11+
CONFIG_LOG_BACKEND_UART=n
12+
13+
CONFIG_BOOT_BANNER=n
14+
CONFIG_EARLY_CONSOLE=y
15+
CONFIG_HEAP_MEM_POOL_SIZE=1024
16+
17+
CONFIG_SIZE_OPTIMIZATIONS=y

‎tests/subsys/event_manager_proxy/remote/boards/nrf54h20dk_nrf54h20_cpuppr_icmsg.overlay‎

Lines changed: 25 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,25 @@
1+
/*
2+
* Copyright (c) 2025 Nordic Semiconductor ASA
3+
*
4+
* SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
5+
*/
6+
7+
/* Enabled nodes required by IPC
8+
* Two mboxes, one for each sides and one ipc instance
9+
*/
10+
11+
&cpuppr_vevif {
12+
status = "okay";
13+
};
14+
15+
&cpuapp_bellboard {
16+
status = "okay";
17+
};
18+
19+
ipc0: &cpuapp_cpuppr_ipc {
20+
status = "okay";
21+
};
22+
23+
&uart135 {
24+
/delete-property/ hw-flow-control;
25+
};

‎tests/subsys/event_manager_proxy/remote/boards/nrf54l15dk_nrf54l15_cpuflpr_icmsg.overlay‎

Lines changed: 46 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,46 @@
1+
/*
2+
* Copyright (c) 2025 Nordic Semiconductor ASA
3+
*
4+
* SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
5+
*/
6+
7+
/ {
8+
soc {
9+
reserved-memory {
10+
#address-cells = <1>;
11+
#size-cells = <1>;
12+
13+
sram_tx: memory@20018000 {
14+
reg = <0x20018000 0x8000>;
15+
};
16+
17+
sram_rx: memory@20020000 {
18+
reg = <0x20020000 0x8000>;
19+
};
20+
};
21+
};
22+
23+
ipc {
24+
ipc0: ipc0 {
25+
compatible = "zephyr,ipc-icmsg";
26+
dcache-alignment = <32>;
27+
tx-region = <&sram_tx>;
28+
rx-region = <&sram_rx>;
29+
mboxes = <&cpuflpr_vevif_rx 21>, <&cpuflpr_vevif_tx 20>;
30+
mbox-names = "rx", "tx";
31+
status = "okay";
32+
};
33+
};
34+
};
35+
36+
&cpuflpr_vevif_rx {
37+
status = "okay";
38+
};
39+
40+
&cpuflpr_vevif_tx {
41+
status = "okay";
42+
};
43+
44+
&uart30 {
45+
/delete-property/ hw-flow-control;
46+
};

‎tests/subsys/event_manager_proxy/remote/boards/nrf54lm20pdk_nrf54lm20a_cpuflpr_icmsg.overlay‎

Lines changed: 46 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,46 @@
1+
/*
2+
* Copyright (c) 2025 Nordic Semiconductor ASA
3+
*
4+
* SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
5+
*/
6+
7+
/ {
8+
soc {
9+
reserved-memory {
10+
#address-cells = <1>;
11+
#size-cells = <1>;
12+
13+
sram_tx: memory@20057c00 {
14+
reg = <0x20057c00 0x8000>;
15+
};
16+
17+
sram_rx: memory@2005fc00 {
18+
reg = <0x2005fc00 0x8000>;
19+
};
20+
};
21+
};
22+
23+
ipc {
24+
ipc0: ipc0 {
25+
compatible = "zephyr,ipc-icmsg";
26+
dcache-alignment = <32>;
27+
tx-region = <&sram_tx>;
28+
rx-region = <&sram_rx>;
29+
mboxes = <&cpuflpr_vevif_rx 21>, <&cpuflpr_vevif_tx 20>;
30+
mbox-names = "rx", "tx";
31+
status = "okay";
32+
};
33+
};
34+
};
35+
36+
&cpuflpr_vevif_rx {
37+
status = "okay";
38+
};
39+
40+
&cpuflpr_vevif_tx {
41+
status = "okay";
42+
};
43+
44+
&uart30 {
45+
/delete-property/ hw-flow-control;
46+
};

0 commit comments

Comments
 (0)