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10 | 10 | #include <stdint.h> |
11 | 11 | #include <stdbool.h> |
12 | 12 | #include <drivers/mspi/nrfe_mspi.h> |
| 13 | +#include <zephyr/drivers/mspi.h> |
13 | 14 |
|
14 | | -/* Max word size. */ |
15 | | -#define MAX_WORD_SIZE NRF_VPR_CSR_VIO_SHIFT_CNT_OUT_BUFFERED_MAX |
| 15 | +#define VPRCSR_NORDIC_OUT_HIGH 1 |
| 16 | +#define VPRCSR_NORDIC_OUT_LOW 0 |
16 | 17 |
|
17 | | -/* Macro for getting direction mask for specified pin and direction. */ |
18 | | -#define PIN_DIR_MASK(PIN_NUM, DIR) \ |
19 | | - (VPRCSR_NORDIC_DIR_PIN##PIN_NUM##_##DIR << VPRCSR_NORDIC_DIR_PIN##PIN_NUM##_Pos) |
| 18 | +#define VPRCSR_NORDIC_DIR_OUTPUT 1 |
| 19 | +#define VPRCSR_NORDIC_DIR_INPUT 0 |
20 | 20 |
|
21 | | -/* Macro for getting output mask for specified pin. */ |
22 | | -#define PIN_DIR_OUT_MASK(PIN_NUM) PIN_DIR_MASK(PIN_NUM, OUTPUT) |
23 | | - |
24 | | -/* Macro for getting input mask for specified pin. */ |
25 | | -#define PIN_DIR_IN_MASK(PIN_NUM) PIN_DIR_MASK(PIN_NUM, INPUT) |
26 | | - |
27 | | -/* Macro for getting state mask for specified pin and state. */ |
28 | | -#define PIN_OUT_MASK(PIN_NUM, STATE) \ |
29 | | - (VPRCSR_NORDIC_OUT_PIN##PIN_NUM##_##STATE << VPRCSR_NORDIC_OUT_PIN##PIN_NUM##_Pos) |
30 | | - |
31 | | -/* Macro for getting high state mask for specified pin. */ |
32 | | -#define PIN_OUT_HIGH_MASK(PIN_NUM) PIN_OUT_MASK(PIN_NUM, HIGH) |
33 | | - |
34 | | -/* Macro for getting low state mask for specified pin. */ |
35 | | -#define PIN_OUT_LOW_MASK(PIN_NUM) PIN_OUT_MASK(PIN_NUM, LOW) |
| 21 | +#define BITS_IN_WORD 32 |
| 22 | +#define BITS_IN_BYTE 8 |
36 | 23 |
|
37 | 24 | /** @brief Low level transfer parameters. */ |
38 | | -struct hrt_ll_xfer { |
39 | | - /** @brief Top value of VTIM. This will determine clock frequency |
40 | | - * (SPI_CLOCK ~= CPU_CLOCK / (2 * TOP)). |
41 | | - */ |
42 | | - volatile uint8_t counter_top; |
43 | | - |
44 | | - /** @brief Word size of passed data, bits. */ |
45 | | - volatile uint8_t word_size; |
| 25 | +struct hrt_xfer { |
46 | 26 |
|
47 | | - /** @brief Data to send, under each index there is data of length word_size. */ |
48 | | - volatile uint32_t *data_to_send; |
| 27 | + /** @brief When true clock signal makes 1 transition less. |
| 28 | + * It is required for spi modes 1 and 3 due to hardware issue. |
| 29 | + */ |
| 30 | + bool eliminate_last_pulse; |
49 | 31 |
|
50 | | - /** @brief Data length. */ |
51 | | - volatile uint8_t data_len; |
| 32 | + /** @brief Tx mode mask for csr dir register */ |
| 33 | + uint16_t tx_direction_mask; |
52 | 34 |
|
53 | | - /** @brief If true chip enable pin will be left active after transfer */ |
54 | | - volatile uint8_t ce_hold; |
| 35 | + /** @brief Rx mode mask for csr dir register */ |
| 36 | + uint16_t rx_direction_mask; |
55 | 37 |
|
56 | | - /** @brief Chip enable pin polarity in enabled state. */ |
57 | | - volatile bool ce_enable_state; |
58 | 38 | }; |
59 | 39 |
|
60 | | -/** @brief Write on single line. |
61 | | - * |
62 | | - * Function to be used to write data on single data line (SPI). |
63 | | - * |
64 | | - * @param[in] xfer_ll_params Low level transfer parameters. |
65 | | - */ |
66 | | -void write_single_by_word(volatile struct hrt_ll_xfer xfer_ll_params); |
67 | | - |
68 | | -/** @brief Write on four lines. |
| 40 | +/** @brief Write. |
69 | 41 | * |
70 | | - * Function to be used to write data on quad data line (SPI). |
| 42 | + * Function to be used to write data on SPI. |
71 | 43 | * |
72 | | - * @param[in] xfer_ll_params Low level transfer parameters. |
| 44 | + * @param[in] xfer_ll_params Low level transfer parameters and data. |
73 | 45 | */ |
74 | | -void write_quad_by_word(volatile struct hrt_ll_xfer xfer_ll_params); |
| 46 | +void hrt_write(struct hrt_xfer *xfer_ll_params); |
75 | 47 |
|
76 | 48 | #endif /* _HRT_H__ */ |
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