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SPARC: Modernize AsmBackend
* Move implementations out-of-line to align with other backends. * clang-format the class.
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‎llvm/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp‎

Lines changed: 151 additions & 154 deletions
Original file line numberDiff line numberDiff line change
@@ -112,167 +112,164 @@ static unsigned getFixupKindNumBytes(unsigned Kind) {
112112
}
113113

114114
namespace {
115-
class SparcAsmBackend : public MCAsmBackend {
116-
protected:
117-
bool Is64Bit;
118-
bool IsV8Plus;
119-
120-
public:
121-
SparcAsmBackend(const MCSubtargetInfo &STI)
122-
: MCAsmBackend(STI.getTargetTriple().isLittleEndian()
123-
? llvm::endianness::little
124-
: llvm::endianness::big),
125-
Is64Bit(STI.getTargetTriple().isArch64Bit()),
126-
IsV8Plus(STI.hasFeature(Sparc::FeatureV8Plus)) {}
127-
128-
129-
std::optional<MCFixupKind> getFixupKind(StringRef Name) const override {
130-
unsigned Type;
131-
Type = llvm::StringSwitch<unsigned>(Name)
115+
class SparcAsmBackend : public MCAsmBackend {
116+
protected:
117+
bool Is64Bit;
118+
bool IsV8Plus;
119+
120+
public:
121+
SparcAsmBackend(const MCSubtargetInfo &STI)
122+
: MCAsmBackend(STI.getTargetTriple().isLittleEndian()
123+
? llvm::endianness::little
124+
: llvm::endianness::big),
125+
Is64Bit(STI.getTargetTriple().isArch64Bit()),
126+
IsV8Plus(STI.hasFeature(Sparc::FeatureV8Plus)) {}
127+
128+
std::optional<MCFixupKind> getFixupKind(StringRef Name) const override;
129+
MCFixupKindInfo getFixupKindInfo(MCFixupKind Kind) const override;
130+
void applyFixup(const MCFragment &, const MCFixup &, const MCValue &Target,
131+
MutableArrayRef<char> Data, uint64_t Value,
132+
bool IsResolved) override;
133+
134+
bool writeNopData(raw_ostream &OS, uint64_t Count,
135+
const MCSubtargetInfo *STI) const override {
136+
137+
// If the count is not 4-byte aligned, we must be writing data into the
138+
// text section (otherwise we have unaligned instructions, and thus have
139+
// far bigger problems), so just write zeros instead.
140+
OS.write_zeros(Count % 4);
141+
142+
uint64_t NumNops = Count / 4;
143+
for (uint64_t i = 0; i != NumNops; ++i)
144+
support::endian::write<uint32_t>(OS, 0x01000000, Endian);
145+
146+
return true;
147+
}
148+
};
149+
150+
class ELFSparcAsmBackend : public SparcAsmBackend {
151+
Triple::OSType OSType;
152+
153+
public:
154+
ELFSparcAsmBackend(const MCSubtargetInfo &STI, Triple::OSType OSType)
155+
: SparcAsmBackend(STI), OSType(OSType) {}
156+
157+
std::unique_ptr<MCObjectTargetWriter>
158+
createObjectTargetWriter() const override {
159+
uint8_t OSABI = MCELFObjectTargetWriter::getOSABI(OSType);
160+
return createSparcELFObjectWriter(Is64Bit, IsV8Plus, OSABI);
161+
}
162+
};
163+
} // end anonymous namespace
164+
165+
std::optional<MCFixupKind> SparcAsmBackend::getFixupKind(StringRef Name) const {
166+
unsigned Type;
167+
Type = llvm::StringSwitch<unsigned>(Name)
132168
#define ELF_RELOC(X, Y) .Case(#X, Y)
133169
#include "llvm/BinaryFormat/ELFRelocs/Sparc.def"
134170
#undef ELF_RELOC
135-
.Case("BFD_RELOC_NONE", ELF::R_SPARC_NONE)
136-
.Case("BFD_RELOC_8", ELF::R_SPARC_8)
137-
.Case("BFD_RELOC_16", ELF::R_SPARC_16)
138-
.Case("BFD_RELOC_32", ELF::R_SPARC_32)
139-
.Case("BFD_RELOC_64", ELF::R_SPARC_64)
140-
.Default(-1u);
141-
if (Type == -1u)
142-
return std::nullopt;
143-
return static_cast<MCFixupKind>(FirstLiteralRelocationKind + Type);
144-
}
145-
146-
MCFixupKindInfo getFixupKindInfo(MCFixupKind Kind) const override {
147-
// clang-format off
148-
const static MCFixupKindInfo InfosBE[Sparc::NumTargetFixupKinds] = {
149-
// name offset bits flags
150-
{ "fixup_sparc_call30", 2, 30, MCFixupKindInfo::FKF_IsPCRel },
151-
{ "fixup_sparc_13", 19, 13, 0 },
152-
};
153-
154-
const static MCFixupKindInfo InfosLE[Sparc::NumTargetFixupKinds] = {
155-
// name offset bits flags
156-
{ "fixup_sparc_call30", 0, 30, MCFixupKindInfo::FKF_IsPCRel },
157-
{ "fixup_sparc_13", 0, 13, 0 },
158-
};
159-
// clang-format on
160-
161-
if (!mc::isRelocation(Kind)) {
162-
if (Kind < FirstTargetFixupKind)
163-
return MCAsmBackend::getFixupKindInfo(Kind);
164-
assert(unsigned(Kind - FirstTargetFixupKind) <
165-
Sparc::NumTargetFixupKinds &&
166-
"Invalid kind!");
167-
if (Endian == llvm::endianness::little)
168-
return InfosLE[Kind - FirstTargetFixupKind];
169-
170-
return InfosBE[Kind - FirstTargetFixupKind];
171-
}
172-
173-
MCFixupKindInfo Info{};
174-
switch (uint16_t(Kind)) {
175-
case ELF::R_SPARC_PC10:
176-
Info = {"", 22, 10, MCFixupKindInfo::FKF_IsPCRel};
177-
break;
178-
case ELF::R_SPARC_PC22:
179-
Info = {"", 10, 22, MCFixupKindInfo::FKF_IsPCRel};
180-
break;
181-
case ELF::R_SPARC_WDISP10:
182-
Info = {"", 0, 32, MCFixupKindInfo::FKF_IsPCRel};
183-
break;
184-
case ELF::R_SPARC_WDISP16:
185-
Info = {"", 0, 32, MCFixupKindInfo::FKF_IsPCRel};
186-
break;
187-
case ELF::R_SPARC_WDISP19:
188-
Info = {"", 13, 19, MCFixupKindInfo::FKF_IsPCRel};
189-
break;
190-
case ELF::R_SPARC_WDISP22:
191-
Info = {"", 10, 22, MCFixupKindInfo::FKF_IsPCRel};
192-
break;
193-
194-
case ELF::R_SPARC_HI22:
195-
Info = {"", 10, 22, 0};
196-
break;
197-
case ELF::R_SPARC_LO10:
198-
Info = {"", 22, 10, 0};
199-
break;
200-
case ELF::R_SPARC_HH22:
201-
Info = {"", 10, 22, 0};
202-
break;
203-
case ELF::R_SPARC_HM10:
204-
Info = {"", 22, 10, 0};
205-
break;
206-
case ELF::R_SPARC_LM22:
207-
Info = {"", 10, 22, 0};
208-
break;
209-
case ELF::R_SPARC_HIX22:
210-
Info = {"", 10, 22, 0};
211-
break;
212-
case ELF::R_SPARC_LOX10:
213-
Info = {"", 19, 13, 0};
214-
break;
215-
}
216-
if (Endian == llvm::endianness::little)
217-
Info.TargetOffset = 32 - Info.TargetOffset - Info.TargetSize;
218-
return Info;
219-
}
220-
221-
void relaxInstruction(MCInst &Inst,
222-
const MCSubtargetInfo &STI) const override {
223-
// FIXME.
224-
llvm_unreachable("relaxInstruction() unimplemented");
225-
}
226-
227-
bool writeNopData(raw_ostream &OS, uint64_t Count,
228-
const MCSubtargetInfo *STI) const override {
229-
230-
// If the count is not 4-byte aligned, we must be writing data into the
231-
// text section (otherwise we have unaligned instructions, and thus have
232-
// far bigger problems), so just write zeros instead.
233-
OS.write_zeros(Count % 4);
234-
235-
uint64_t NumNops = Count / 4;
236-
for (uint64_t i = 0; i != NumNops; ++i)
237-
support::endian::write<uint32_t>(OS, 0x01000000, Endian);
238-
239-
return true;
240-
}
171+
.Case("BFD_RELOC_NONE", ELF::R_SPARC_NONE)
172+
.Case("BFD_RELOC_8", ELF::R_SPARC_8)
173+
.Case("BFD_RELOC_16", ELF::R_SPARC_16)
174+
.Case("BFD_RELOC_32", ELF::R_SPARC_32)
175+
.Case("BFD_RELOC_64", ELF::R_SPARC_64)
176+
.Default(-1u);
177+
if (Type == -1u)
178+
return std::nullopt;
179+
return static_cast<MCFixupKind>(FirstLiteralRelocationKind + Type);
180+
}
181+
182+
MCFixupKindInfo SparcAsmBackend::getFixupKindInfo(MCFixupKind Kind) const {
183+
// clang-format off
184+
const static MCFixupKindInfo InfosBE[Sparc::NumTargetFixupKinds] = {
185+
// name offset bits flags
186+
{ "fixup_sparc_call30", 2, 30, MCFixupKindInfo::FKF_IsPCRel },
187+
{ "fixup_sparc_13", 19, 13, 0 },
241188
};
242189

243-
class ELFSparcAsmBackend : public SparcAsmBackend {
244-
Triple::OSType OSType;
245-
public:
246-
ELFSparcAsmBackend(const MCSubtargetInfo &STI, Triple::OSType OSType)
247-
: SparcAsmBackend(STI), OSType(OSType) {}
248-
249-
void applyFixup(const MCFragment &, const MCFixup &Fixup,
250-
const MCValue &Target, MutableArrayRef<char> Data,
251-
uint64_t Value, bool IsResolved) override {
252-
if (!IsResolved)
253-
return;
254-
Value = adjustFixupValue(Fixup.getKind(), Value);
255-
256-
unsigned NumBytes = getFixupKindNumBytes(Fixup.getKind());
257-
unsigned Offset = Fixup.getOffset();
258-
// For each byte of the fragment that the fixup touches, mask in the bits
259-
// from the fixup value. The Value has been "split up" into the
260-
// appropriate bitfields above.
261-
for (unsigned i = 0; i != NumBytes; ++i) {
262-
unsigned Idx =
263-
Endian == llvm::endianness::little ? i : (NumBytes - 1) - i;
264-
Data[Offset + Idx] |= uint8_t((Value >> (i * 8)) & 0xff);
265-
}
266-
}
267-
268-
std::unique_ptr<MCObjectTargetWriter>
269-
createObjectTargetWriter() const override {
270-
uint8_t OSABI = MCELFObjectTargetWriter::getOSABI(OSType);
271-
return createSparcELFObjectWriter(Is64Bit, IsV8Plus, OSABI);
272-
}
190+
const static MCFixupKindInfo InfosLE[Sparc::NumTargetFixupKinds] = {
191+
// name offset bits flags
192+
{ "fixup_sparc_call30", 0, 30, MCFixupKindInfo::FKF_IsPCRel },
193+
{ "fixup_sparc_13", 0, 13, 0 },
273194
};
195+
// clang-format on
274196

275-
} // end anonymous namespace
197+
if (!mc::isRelocation(Kind)) {
198+
if (Kind < FirstTargetFixupKind)
199+
return MCAsmBackend::getFixupKindInfo(Kind);
200+
assert(unsigned(Kind - FirstTargetFixupKind) < Sparc::NumTargetFixupKinds &&
201+
"Invalid kind!");
202+
if (Endian == llvm::endianness::little)
203+
return InfosLE[Kind - FirstTargetFixupKind];
204+
205+
return InfosBE[Kind - FirstTargetFixupKind];
206+
}
207+
208+
MCFixupKindInfo Info{};
209+
switch (uint16_t(Kind)) {
210+
case ELF::R_SPARC_PC10:
211+
Info = {"", 22, 10, MCFixupKindInfo::FKF_IsPCRel};
212+
break;
213+
case ELF::R_SPARC_PC22:
214+
Info = {"", 10, 22, MCFixupKindInfo::FKF_IsPCRel};
215+
break;
216+
case ELF::R_SPARC_WDISP10:
217+
Info = {"", 0, 32, MCFixupKindInfo::FKF_IsPCRel};
218+
break;
219+
case ELF::R_SPARC_WDISP16:
220+
Info = {"", 0, 32, MCFixupKindInfo::FKF_IsPCRel};
221+
break;
222+
case ELF::R_SPARC_WDISP19:
223+
Info = {"", 13, 19, MCFixupKindInfo::FKF_IsPCRel};
224+
break;
225+
case ELF::R_SPARC_WDISP22:
226+
Info = {"", 10, 22, MCFixupKindInfo::FKF_IsPCRel};
227+
break;
228+
229+
case ELF::R_SPARC_HI22:
230+
Info = {"", 10, 22, 0};
231+
break;
232+
case ELF::R_SPARC_LO10:
233+
Info = {"", 22, 10, 0};
234+
break;
235+
case ELF::R_SPARC_HH22:
236+
Info = {"", 10, 22, 0};
237+
break;
238+
case ELF::R_SPARC_HM10:
239+
Info = {"", 22, 10, 0};
240+
break;
241+
case ELF::R_SPARC_LM22:
242+
Info = {"", 10, 22, 0};
243+
break;
244+
case ELF::R_SPARC_HIX22:
245+
Info = {"", 10, 22, 0};
246+
break;
247+
case ELF::R_SPARC_LOX10:
248+
Info = {"", 19, 13, 0};
249+
break;
250+
}
251+
if (Endian == llvm::endianness::little)
252+
Info.TargetOffset = 32 - Info.TargetOffset - Info.TargetSize;
253+
return Info;
254+
}
255+
256+
void SparcAsmBackend::applyFixup(const MCFragment &, const MCFixup &Fixup,
257+
const MCValue &Target,
258+
MutableArrayRef<char> Data, uint64_t Value,
259+
bool IsResolved) {
260+
if (!IsResolved)
261+
return;
262+
Value = adjustFixupValue(Fixup.getKind(), Value);
263+
264+
unsigned NumBytes = getFixupKindNumBytes(Fixup.getKind());
265+
unsigned Offset = Fixup.getOffset();
266+
// For each byte of the fragment that the fixup touches, mask in the
267+
// bits from the fixup value.
268+
for (unsigned i = 0; i != NumBytes; ++i) {
269+
unsigned Idx = Endian == llvm::endianness::little ? i : (NumBytes - 1) - i;
270+
Data[Offset + Idx] |= uint8_t((Value >> (i * 8)) & 0xff);
271+
}
272+
}
276273

277274
MCAsmBackend *llvm::createSparcAsmBackend(const Target &T,
278275
const MCSubtargetInfo &STI,

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