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Revert "[RISCV] Allow spilling to unused Zcmp Stack (llvm#125959)"
This reverts commit 50cdf6c. This patch causes miscompiles with vector and produces some odd code for ilp32e.
1 parent 0fdb908 commit d254954

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10 files changed

+1683
-1656
lines changed

10 files changed

+1683
-1656
lines changed

‎llvm/lib/Target/RISCV/RISCVFrameLowering.cpp‎

Lines changed: 3 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -1795,15 +1795,10 @@ bool RISCVFrameLowering::assignCalleeSavedSpillSlots(
17951795
MFI.CreateFixedSpillStackObject(
17961796
QCIInterruptPushAmount, -static_cast<int64_t>(QCIInterruptPushAmount));
17971797
} else if (RVFI->isPushable(MF)) {
1798-
// Allocate a fixed object that covers all the registers that are pushed.
1799-
if (unsigned PushedRegs = RVFI->getRVPushRegs()) {
1800-
int64_t PushedRegsBytes =
1801-
static_cast<int64_t>(PushedRegs) * (STI.getXLen() / 8);
1802-
MFI.CreateFixedSpillStackObject(PushedRegsBytes, -PushedRegsBytes);
1803-
}
1798+
// Allocate a fixed object that covers the full push.
1799+
if (int64_t PushSize = RVFI->getRVPushStackSize())
1800+
MFI.CreateFixedSpillStackObject(PushSize, -PushSize);
18041801
} else if (int LibCallRegs = getLibCallID(MF, CSI) + 1) {
1805-
// Allocate a fixed object that covers all of the stack allocated by the
1806-
// libcall.
18071802
int64_t LibCallFrameSize =
18081803
alignTo((STI.getXLen() / 8) * LibCallRegs, getStackAlign());
18091804
MFI.CreateFixedSpillStackObject(LibCallFrameSize, -LibCallFrameSize);

‎llvm/test/CodeGen/RISCV/callee-saved-gprs.ll‎

Lines changed: 118 additions & 118 deletions
Large diffs are not rendered by default.

‎llvm/test/CodeGen/RISCV/push-pop-popret.ll‎

Lines changed: 516 additions & 508 deletions
Large diffs are not rendered by default.

‎llvm/test/CodeGen/RISCV/rvv/rv32-spill-vector-csr.ll‎

Lines changed: 22 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -108,35 +108,39 @@ define <vscale x 1 x double> @foo(<vscale x 1 x double> %a, <vscale x 1 x double
108108
;
109109
; SPILL-O2-ZCMP-LABEL: foo:
110110
; SPILL-O2-ZCMP: # %bb.0:
111-
; SPILL-O2-ZCMP-NEXT: cm.push {ra, s0}, -16
112-
; SPILL-O2-ZCMP-NEXT: .cfi_def_cfa_offset 16
111+
; SPILL-O2-ZCMP-NEXT: cm.push {ra, s0}, -32
112+
; SPILL-O2-ZCMP-NEXT: .cfi_def_cfa_offset 32
113113
; SPILL-O2-ZCMP-NEXT: .cfi_offset ra, -8
114114
; SPILL-O2-ZCMP-NEXT: .cfi_offset s0, -4
115115
; SPILL-O2-ZCMP-NEXT: csrr a1, vlenb
116116
; SPILL-O2-ZCMP-NEXT: slli a1, a1, 1
117117
; SPILL-O2-ZCMP-NEXT: sub sp, sp, a1
118-
; SPILL-O2-ZCMP-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x02, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 2 * vlenb
118+
; SPILL-O2-ZCMP-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x20, 0x22, 0x11, 0x02, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 32 + 2 * vlenb
119119
; SPILL-O2-ZCMP-NEXT: mv s0, a0
120-
; SPILL-O2-ZCMP-NEXT: vs1r.v v8, (sp) # vscale x 8-byte Folded Spill
120+
; SPILL-O2-ZCMP-NEXT: addi a1, sp, 16
121+
; SPILL-O2-ZCMP-NEXT: vs1r.v v8, (a1) # vscale x 8-byte Folded Spill
121122
; SPILL-O2-ZCMP-NEXT: vsetvli zero, a0, e64, m1, ta, ma
122123
; SPILL-O2-ZCMP-NEXT: vfadd.vv v9, v8, v9
123124
; SPILL-O2-ZCMP-NEXT: csrr a0, vlenb
124125
; SPILL-O2-ZCMP-NEXT: add a0, a0, sp
126+
; SPILL-O2-ZCMP-NEXT: addi a0, a0, 16
125127
; SPILL-O2-ZCMP-NEXT: vs1r.v v9, (a0) # vscale x 8-byte Folded Spill
126128
; SPILL-O2-ZCMP-NEXT: lui a0, %hi(.L.str)
127129
; SPILL-O2-ZCMP-NEXT: addi a0, a0, %lo(.L.str)
128130
; SPILL-O2-ZCMP-NEXT: call puts
129131
; SPILL-O2-ZCMP-NEXT: csrr a0, vlenb
130132
; SPILL-O2-ZCMP-NEXT: add a0, a0, sp
133+
; SPILL-O2-ZCMP-NEXT: addi a0, a0, 16
131134
; SPILL-O2-ZCMP-NEXT: vl1r.v v8, (a0) # vscale x 8-byte Folded Reload
132-
; SPILL-O2-ZCMP-NEXT: vl1r.v v9, (sp) # vscale x 8-byte Folded Reload
135+
; SPILL-O2-ZCMP-NEXT: addi a0, sp, 16
136+
; SPILL-O2-ZCMP-NEXT: vl1r.v v9, (a0) # vscale x 8-byte Folded Reload
133137
; SPILL-O2-ZCMP-NEXT: vsetvli zero, s0, e64, m1, ta, ma
134138
; SPILL-O2-ZCMP-NEXT: vfadd.vv v8, v9, v8
135139
; SPILL-O2-ZCMP-NEXT: csrr a0, vlenb
136140
; SPILL-O2-ZCMP-NEXT: slli a0, a0, 1
137141
; SPILL-O2-ZCMP-NEXT: add sp, sp, a0
138-
; SPILL-O2-ZCMP-NEXT: .cfi_def_cfa sp, 16
139-
; SPILL-O2-ZCMP-NEXT: cm.popret {ra, s0}, 16
142+
; SPILL-O2-ZCMP-NEXT: .cfi_def_cfa sp, 32
143+
; SPILL-O2-ZCMP-NEXT: cm.popret {ra, s0}, 32
140144
;
141145
; SPILL-O0-VSETVLI-LABEL: foo:
142146
; SPILL-O0-VSETVLI: # %bb.0:
@@ -227,33 +231,37 @@ define <vscale x 1 x double> @foo(<vscale x 1 x double> %a, <vscale x 1 x double
227231
;
228232
; SPILL-O2-ZCMP-VSETVLI-LABEL: foo:
229233
; SPILL-O2-ZCMP-VSETVLI: # %bb.0:
230-
; SPILL-O2-ZCMP-VSETVLI-NEXT: cm.push {ra, s0}, -16
231-
; SPILL-O2-ZCMP-VSETVLI-NEXT: .cfi_def_cfa_offset 16
234+
; SPILL-O2-ZCMP-VSETVLI-NEXT: cm.push {ra, s0}, -32
235+
; SPILL-O2-ZCMP-VSETVLI-NEXT: .cfi_def_cfa_offset 32
232236
; SPILL-O2-ZCMP-VSETVLI-NEXT: .cfi_offset ra, -8
233237
; SPILL-O2-ZCMP-VSETVLI-NEXT: .cfi_offset s0, -4
234238
; SPILL-O2-ZCMP-VSETVLI-NEXT: vsetvli a1, zero, e8, m2, ta, ma
235239
; SPILL-O2-ZCMP-VSETVLI-NEXT: sub sp, sp, a1
236-
; SPILL-O2-ZCMP-VSETVLI-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x02, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 2 * vlenb
240+
; SPILL-O2-ZCMP-VSETVLI-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x20, 0x22, 0x11, 0x02, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 32 + 2 * vlenb
237241
; SPILL-O2-ZCMP-VSETVLI-NEXT: mv s0, a0
238-
; SPILL-O2-ZCMP-VSETVLI-NEXT: vs1r.v v8, (sp) # vscale x 8-byte Folded Spill
242+
; SPILL-O2-ZCMP-VSETVLI-NEXT: addi a1, sp, 16
243+
; SPILL-O2-ZCMP-VSETVLI-NEXT: vs1r.v v8, (a1) # vscale x 8-byte Folded Spill
239244
; SPILL-O2-ZCMP-VSETVLI-NEXT: vsetvli zero, a0, e64, m1, ta, ma
240245
; SPILL-O2-ZCMP-VSETVLI-NEXT: vfadd.vv v9, v8, v9
241246
; SPILL-O2-ZCMP-VSETVLI-NEXT: csrr a0, vlenb
242247
; SPILL-O2-ZCMP-VSETVLI-NEXT: add a0, a0, sp
248+
; SPILL-O2-ZCMP-VSETVLI-NEXT: addi a0, a0, 16
243249
; SPILL-O2-ZCMP-VSETVLI-NEXT: vs1r.v v9, (a0) # vscale x 8-byte Folded Spill
244250
; SPILL-O2-ZCMP-VSETVLI-NEXT: lui a0, %hi(.L.str)
245251
; SPILL-O2-ZCMP-VSETVLI-NEXT: addi a0, a0, %lo(.L.str)
246252
; SPILL-O2-ZCMP-VSETVLI-NEXT: call puts
247253
; SPILL-O2-ZCMP-VSETVLI-NEXT: csrr a0, vlenb
248254
; SPILL-O2-ZCMP-VSETVLI-NEXT: add a0, a0, sp
255+
; SPILL-O2-ZCMP-VSETVLI-NEXT: addi a0, a0, 16
249256
; SPILL-O2-ZCMP-VSETVLI-NEXT: vl1r.v v8, (a0) # vscale x 8-byte Folded Reload
250-
; SPILL-O2-ZCMP-VSETVLI-NEXT: vl1r.v v9, (sp) # vscale x 8-byte Folded Reload
257+
; SPILL-O2-ZCMP-VSETVLI-NEXT: addi a0, sp, 16
258+
; SPILL-O2-ZCMP-VSETVLI-NEXT: vl1r.v v9, (a0) # vscale x 8-byte Folded Reload
251259
; SPILL-O2-ZCMP-VSETVLI-NEXT: vsetvli zero, s0, e64, m1, ta, ma
252260
; SPILL-O2-ZCMP-VSETVLI-NEXT: vfadd.vv v8, v9, v8
253261
; SPILL-O2-ZCMP-VSETVLI-NEXT: vsetvli a0, zero, e8, m2, ta, ma
254262
; SPILL-O2-ZCMP-VSETVLI-NEXT: add sp, sp, a0
255-
; SPILL-O2-ZCMP-VSETVLI-NEXT: .cfi_def_cfa sp, 16
256-
; SPILL-O2-ZCMP-VSETVLI-NEXT: cm.popret {ra, s0}, 16
263+
; SPILL-O2-ZCMP-VSETVLI-NEXT: .cfi_def_cfa sp, 32
264+
; SPILL-O2-ZCMP-VSETVLI-NEXT: cm.popret {ra, s0}, 32
257265
{
258266
%x = call <vscale x 1 x double> @llvm.riscv.vfadd.nxv1f64.nxv1f64(<vscale x 1 x double> undef, <vscale x 1 x double> %a, <vscale x 1 x double> %b, i32 7, i32 %gvl)
259267
%call = call signext i32 @puts(ptr @.str)

‎llvm/test/CodeGen/RISCV/xqccmp-additional-stack.ll‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -9,8 +9,8 @@ define ptr @func(ptr %s, i32 %_c, ptr %incdec.ptr, i1 %0, i8 %conv14) #0 {
99
; RV32-NEXT: .cfi_offset ra, -4
1010
; RV32-NEXT: .cfi_offset s0, -8
1111
; RV32-NEXT: .cfi_offset s1, -12
12-
; RV32-NEXT: addi sp, sp, -4
13-
; RV32-NEXT: .cfi_def_cfa_offset 20
12+
; RV32-NEXT: addi sp, sp, -8
13+
; RV32-NEXT: .cfi_def_cfa_offset 24
1414
; RV32-NEXT: sw a4, 4(sp) # 4-byte Folded Spill
1515
; RV32-NEXT: sw a2, 0(sp) # 4-byte Folded Spill
1616
; RV32-NEXT: mv a2, a1
@@ -34,7 +34,7 @@ define ptr @func(ptr %s, i32 %_c, ptr %incdec.ptr, i1 %0, i8 %conv14) #0 {
3434
; RV32-NEXT: lw a0, 4(sp) # 4-byte Folded Reload
3535
; RV32-NEXT: sb a0, 0(s0)
3636
; RV32-NEXT: mv a0, s1
37-
; RV32-NEXT: addi sp, sp, 4
37+
; RV32-NEXT: addi sp, sp, 8
3838
; RV32-NEXT: .cfi_def_cfa_offset 16
3939
; RV32-NEXT: qc.cm.popret {ra, s0-s1}, 16
4040
entry:

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