[LLVM,X64] Avoid icmp zext where possible

We can't use xor and mov reg, 0 is a 5/6-byte instruction.

Author: aengelke

tpde-llvm/src/x64/LLVMCompilerX64.cpp

@@ -422,7 +422,8 @@ bool LLVMCompilerX64::compile_icmp(const llvm::Instruction *inst,
   if (fuse_br) {
     if (!single_use) {
       (void)result_ref(cmp); // ref-count for branch
-      generate_raw_set(jump, result_ref(cmp).part(0).alloc_reg());
+      generate_raw_set(
+          jump, result_ref(cmp).part(0).alloc_reg(), /*zext=*/false);
     }
     auto true_block = adaptor->block_lookup_idx(fuse_br->getSuccessor(0));
     auto false_block = adaptor->block_lookup_idx(fuse_br->getSuccessor(1));
@@ -431,14 +432,14 @@ bool LLVMCompilerX64::compile_icmp(const llvm::Instruction *inst,
   } else if (fuse_ext) {
     auto [_, res_ref] = result_ref_single(fuse_ext);
     if (llvm::isa<llvm::ZExtInst>(fuse_ext)) {
-      generate_raw_set(jump, res_ref.alloc_reg());
+      generate_raw_set(jump, res_ref.alloc_reg(), /*zext=*/true);
     } else {
       generate_raw_mask(jump, res_ref.alloc_reg());
     }
     this->adaptor->inst_set_fused(fuse_ext, true);
   } else {
     auto [_, res_ref] = result_ref_single(cmp);
-    generate_raw_set(jump, res_ref.alloc_reg());
+    generate_raw_set(jump, res_ref.alloc_reg(), /*zext=*/false);
   }
 
   return true;

tpde-llvm/test/filetest/alloca.ll

@@ -1260,14 +1260,12 @@ define void @alloca_manyregs(i32 %0, ptr %1, ptr %2, ptr %3, i64 %4, i32 %5, ptr
 ; X64-NEXT:    mov r12, r11
 ; X64-NEXT:    mov r12, qword ptr [rbp - 0x40820]
 ; X64-NEXT:    test r12, r12
-; X64-NEXT:    mov r13d, 0x0
 ; X64-NEXT:    sete r13b
 ; X64-NEXT:    mov r13d, dword ptr [rbp - 0x407f8]
 ; X64-NEXT:    mov r14d, r13d
 ; X64-NEXT:    and r14d, 0x0
 ; X64-NEXT:    mov r14, qword ptr [rbp - 0x38]
 ; X64-NEXT:    test r14, r14
-; X64-NEXT:    mov r15d, 0x0
 ; X64-NEXT:    sete r15b
 ; X64-NEXT:    mov r15, qword ptr [rbp - 0x40]
 ; X64-NEXT:    mov eax, dword ptr [r15]
@@ -1281,7 +1279,6 @@ define void @alloca_manyregs(i32 %0, ptr %1, ptr %2, ptr %3, i64 %4, i32 %5, ptr
 ; X64-NEXT:    mov dword ptr [0x0], ecx
 ; X64-NEXT:    mov rcx, qword ptr [rbp - 0x60]
 ; X64-NEXT:    test rcx, rcx
-; X64-NEXT:    mov ecx, 0x0
 ; X64-NEXT:    sete cl
 ; X64-NEXT:    mov rcx, qword ptr [rbp - 0x407d8]
 ; X64-NEXT:    lea rdx, [rcx + 0x4]

tpde-llvm/test/filetest/constants.ll

@@ -1421,7 +1421,6 @@ define void @phi_gep_before_icmp_twice() {
 ; X64-NEXT:    lea rcx, [rcx + 0xa]
 ; X64-NEXT:    mov edx, 0x0
 ; X64-NEXT:    test rdx, rdx
-; X64-NEXT:    mov edx, 0x0
 ; X64-NEXT:    setl dl
 ; X64-NEXT:    mov edx, 0x0
 ; X64-NEXT:    test dl, 0x1

tpde-llvm/test/filetest/icmp-fuse-ext.ll

@@ -96,7 +96,6 @@ define i128 @icmp_fuse_zexti128(i32, i32) {
 ; X64-NEXT:    nop word ptr [rax + rax]
 ; X64-NEXT:    sub rsp, 0x30
 ; X64-NEXT:    cmp edi, esi
-; X64-NEXT:    mov eax, 0x0
 ; X64-NEXT:    setl al
 ; X64-NEXT:    and eax, 0x1
 ; X64-NEXT:    mov ecx, 0x0
@@ -245,7 +244,6 @@ define i128 @icmp_fuse_sexti128(i32, i32) {
 ; X64-NEXT:    nop word ptr [rax + rax]
 ; X64-NEXT:    sub rsp, 0x30
 ; X64-NEXT:    cmp edi, esi
-; X64-NEXT:    mov eax, 0x0
 ; X64-NEXT:    setl al
 ; X64-NEXT:    shl rax, 0x3f
 ; X64-NEXT:    sar rax, 0x3f
@@ -280,7 +278,6 @@ define i64 @icmp_ext_nofuse(i32, i32) {
 ; X64-NEXT:    nop word ptr [rax + rax]
 ; X64-NEXT:    sub rsp, 0x30
 ; X64-NEXT:    cmp edi, esi
-; X64-NEXT:    mov eax, 0x0
 ; X64-NEXT:    setl al
 ; X64-NEXT:    mov ecx, eax
 ; X64-NEXT:    and ecx, 0x1