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[ENCODEGEN][LLVM] Add support for llvm.readcyclecounter intrinsic
Add support for the @llvm.readcyclecounter intrinsic. This is used to obtain the current value of the cycle counter register. The intrinsic is useful to perform micro benchmarks and other small timing scenarios.
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tpde-encodegen/src/arm64/Target.cpp

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@@ -303,6 +303,8 @@ void EncodingTargetArm64::get_inst_candidates(
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handle_adrp("ADRP");
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}
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case_default("MRS", "MRS");
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const auto case_mov_shift = [&](std::string_view mnem_llvm,
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std::string_view mnem_disarm) {
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if (std::string_view{Name} == mnem_llvm) {

tpde-encodegen/src/x64/Target.cpp

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@@ -760,6 +760,8 @@ void EncodingTargetX64::get_inst_candidates(
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case_default("MOVMSKPSrr", -1, "SSE_MOVMSKPSrr");
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case_default("MOVMSKPDrr", -1, "SSE_MOVMSKPDrr");
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case_default("RDTSC", -1, "RDTSC");
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case_default("MFENCE", -1, "MFENCE");
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// clang-format on
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tpde-llvm/src/LLVMCompilerBase.hpp

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@@ -5025,6 +5025,10 @@ bool LLVMCompilerBase<Adaptor, Derived, Config>::compile_intrin(
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this->result_ref(inst).part(0).set_value(std::move(const_ref));
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return true;
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}
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case llvm::Intrinsic::readcyclecounter: {
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ValueRef res = this->result_ref(inst);
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return derived()->encode_readcyclecounter(res.part(0));
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}
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default: {
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return derived()->handle_intrin(inst);
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}

tpde-llvm/src/encode_template.c

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@@ -822,3 +822,5 @@ void prefetch_wl0(void* addr) { __builtin_prefetch(addr, 1, 0); }
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void prefetch_wl1(void* addr) { __builtin_prefetch(addr, 1, 1); }
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void prefetch_wl2(void* addr) { __builtin_prefetch(addr, 1, 2); }
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void prefetch_wl3(void* addr) { __builtin_prefetch(addr, 1, 3); }
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u64 TARGET_V1 readcyclecounter(void) { return __builtin_readcyclecounter(); }
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; NOTE: Assertions have been autogenerated by test/update_tpde_llc_test_checks.py UTC_ARGS: --version 5
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; SPDX-FileCopyrightText: 2025 Contributors to TPDE <https://tpde.org>
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;
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; SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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; RUN: tpde-llc --target=x86_64 %s | %objdump | FileCheck %s -check-prefixes=X64
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; RUN: tpde-llc --target=aarch64 %s | %objdump | FileCheck %s -check-prefixes=ARM64
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define i64 @readcyclecounter() {
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; X64-LABEL: <readcyclecounter>:
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; X64: rdtsc
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; X64-NEXT: shl rdx, 0x20
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; X64-NEXT: or rax, rdx
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; X64-NEXT: ret
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;
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; ARM64-LABEL: <readcyclecounter>:
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; ARM64: mrs x0, CNTVCT_EL0
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; ARM64-NEXT: ret
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%res = call i64 @llvm.readcyclecounter()
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ret i64 %res
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}

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