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gowin: added (undocumented) sequence to be performed when CRC Error bit is set
1 parent 42a4801 commit a53aedb

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2 files changed

+38
-0
lines changed

2 files changed

+38
-0
lines changed

src/gowin.cpp

Lines changed: 30 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -922,7 +922,10 @@ bool Gowin::eraseSRAM()
922922
send_command(READ_IDCODE);
923923
send_command(NOOP);
924924
_jtag->toggleClk(125 * 8);
925+
} else if (is_gw2a) {
926+
gw2a_force_state();
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}
928+
926929
do {
927930

928931
if (!enableCfg()) {
@@ -960,6 +963,7 @@ bool Gowin::eraseSRAM()
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must_loop = false;
961964
loop++;
962965
}
966+
963967
} while(must_loop);
964968

965969
if (_mode == Device::FLASH_MODE) {
@@ -1188,6 +1192,31 @@ bool Gowin::dumpFlash(uint32_t base_addr, uint32_t len)
11881192
return post_flash_access() && ret;
11891193
}
11901194

1195+
void Gowin::gw2a_force_state()
1196+
{
1197+
/* undocumented sequence but required when
1198+
* flash failure
1199+
*/
1200+
uint32_t state = readStatusReg();
1201+
if ((state & STATUS_CRC_ERROR) == 0)
1202+
return;
1203+
send_command(CONFIG_DISABLE);
1204+
send_command(0);
1205+
idCode();
1206+
state = readStatusReg();
1207+
send_command(CONFIG_DISABLE);
1208+
send_command(0);
1209+
state = readStatusReg();
1210+
idCode();
1211+
send_command(CONFIG_ENABLE);
1212+
reset();
1213+
send_command(CONFIG_DISABLE);
1214+
send_command(NOOP);
1215+
idCode();
1216+
send_command(NOOP);
1217+
idCode();
1218+
}
1219+
11911220
bool Gowin::prepare_flash_access()
11921221
{
11931222
/* Work around FPGA stuck in Bad Command status */
@@ -1196,6 +1225,7 @@ bool Gowin::prepare_flash_access()
11961225
_jtag->set_state(Jtag::RUN_TEST_IDLE);
11971226
_jtag->toggleClk(1000000);
11981227
}
1228+
11991229
if (!eraseSRAM()) {
12001230
printError("Error: fail to erase SRAM");
12011231
return false;

src/gowin.hpp

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -52,6 +52,14 @@ class Gowin: public Device, SPIInterface {
5252
int spi_wait(uint8_t cmd, uint8_t mask, uint8_t cond,
5353
uint32_t timeout, bool verbose) override;
5454

55+
/* -------------- */
56+
/* Arora specific */
57+
/* -------------- */
58+
/*!
59+
* \brief undocumented sequence required after an SPI flash failure (CRC Bit set)
60+
*/
61+
void gw2a_force_state();
62+
5563
/* ---------------- */
5664
/* Arora V specific */
5765
/* ---------------- */

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