@@ -190,8 +190,12 @@ static std::map <uint32_t, flash_t> flash_list = {
190190 .tb_register = STATR,
191191 .bp_len = 3 ,
192192 .bp_offset = {(1 << 2 ), (1 << 3 ), (1 << 4 ), 0 },
193- .quad_register = NVCONFR,
194- .quad_mask = (1 << 3 ),
193+ // Disabled because the chip is unable to work in single after being confgured in quad
194+ // this option isn't required and the chip is always able to uses quad mode instructions
195+ .quad_register = NONER,
196+ .quad_mask = 0 ,
197+ // .quad_register = NVCONFR,
198+ // .quad_mask = (1 << 3),
195199 }},
196200 {0x20ba17 , {
197201 .manufacturer = " micron" ,
@@ -205,8 +209,12 @@ static std::map <uint32_t, flash_t> flash_list = {
205209 .tb_register = STATR,
206210 .bp_len = 4 ,
207211 .bp_offset = {(1 << 2 ), (1 << 3 ), (1 << 4 ), (1 << 6 )},
208- .quad_register = NVCONFR,
209- .quad_mask = (1 << 3 ),
212+ // Disabled because the chip is unable to work in single after being confgured in quad
213+ // this option isn't required and the chip is always able to uses quad mode instructions
214+ .quad_register = NONER,
215+ .quad_mask = 0 ,
216+ // .quad_register = NVCONFR,
217+ // .quad_mask = (1 << 3),
210218 }},
211219 {0x20ba18 , {
212220 /* https://media-www.micron.com/-/media/client/global/documents/products/data-sheet/nor-flash/serial-nor/n25q/n25q_128mb_3v_65nm.pdf */
@@ -221,8 +229,12 @@ static std::map <uint32_t, flash_t> flash_list = {
221229 .tb_register = STATR,
222230 .bp_len = 4 ,
223231 .bp_offset = {(1 << 2 ), (1 << 3 ), (1 << 4 ), (1 << 6 )},
224- .quad_register = NVCONFR,
225- .quad_mask = (1 << 3 ),
232+ // Disabled because the chip is unable to work in single after being confgured in quad
233+ // this option isn't required and the chip is always able to uses quad mode instructions
234+ .quad_register = NONER,
235+ .quad_mask = 0 ,
236+ // .quad_register = NVCONFR,
237+ // .quad_mask = (1 << 3),
226238 }},
227239 {0x20ba19 , {
228240 /* https://datasheet.octopart.com/N25Q256A13E1241F-Micron-datasheet-11552757.pdf */
@@ -237,8 +249,12 @@ static std::map <uint32_t, flash_t> flash_list = {
237249 .tb_register = STATR,
238250 .bp_len = 4 ,
239251 .bp_offset = {(1 << 2 ), (1 << 3 ), (1 << 4 ), (1 << 6 )},
240- .quad_register = NVCONFR,
241- .quad_mask = (1 << 3 ),
252+ // Disabled because the chip is unable to work in single after being confgured in quad
253+ // this option isn't required and the chip is always able to uses quad mode instructions
254+ .quad_register = NONER,
255+ .quad_mask = 0 ,
256+ // .quad_register = NVCONFR,
257+ // .quad_mask = (1 << 3),
242258 }},
243259 {0x20bb18 , {
244260 /* https://www.micron.com/-/media/client/global/documents/products/data-sheet/nor-flash/serial-nor/n25q/n25q_128mb_1_8v_65nm.pdf */
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