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1 parent 842f3c7 commit 435fb9eCopy full SHA for 435fb9e
third_party/amd/lib/TritonAMDGPUToLLVM/LoadStoreOpToLLVM.cpp
@@ -417,6 +417,7 @@ struct AsyncCopyToGlobalOpConversion
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const AMD::TargetInfo &targetInfo) const {
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llvm::SmallSetVector<unsigned, 10> supportedWidths;
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switch (targetInfo.getISAFamily()) {
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+ case mlir::triton::AMD::ISAFamily::CDNA1:
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case mlir::triton::AMD::ISAFamily::CDNA2:
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case mlir::triton::AMD::ISAFamily::CDNA3:
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supportedWidths.insert(8);
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