From 677efd2a9f8942f82a55cfdc2cbc74b65f5829da Mon Sep 17 00:00:00 2001 From: Stanley Winata Date: Tue, 25 Nov 2025 17:33:56 -0800 Subject: [PATCH] [Backend] Bump to llvm/llvm-project@ebf5d9e This bump picks up https://github.com/llvm/llvm-project/pull/169546 which resolves some register spilling in downstream use cases. Additionally, we also pick up https://github.com/llvm/llvm-project/pull/166648 which converted udiv and sdiv to non Pure attributes. This require changes on warp_specialize_to_llvm.mlir `remat_subgraph` since the original test found in https://github.com/triton-lang/triton/commit/8601b399937f58cf835c4ad6b8f94040ff6debd5 was meant to test rematerializing some "pure ops" into partition region, which the tested udiv is no longer. This PR Replaced it with urem which is similar class of op who still has Pure trait. Signed-off-by: Stanley Winata --- cmake/llvm-hash.txt | 2 +- test/Conversion/warp_specialize_to_llvm.mlir | 6 +++--- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/cmake/llvm-hash.txt b/cmake/llvm-hash.txt index 1bb3165bbb35..be0c83e16a88 100644 --- a/cmake/llvm-hash.txt +++ b/cmake/llvm-hash.txt @@ -1 +1 @@ -49d5bb0ad0cb31410184c462801c5049ad671517 +ebf5d9ef7de29b55fd9e9d504f83689b4013e0de diff --git a/test/Conversion/warp_specialize_to_llvm.mlir b/test/Conversion/warp_specialize_to_llvm.mlir index b512fab076e0..7da034bb76bb 100644 --- a/test/Conversion/warp_specialize_to_llvm.mlir +++ b/test/Conversion/warp_specialize_to_llvm.mlir @@ -653,7 +653,7 @@ llvm.func @remat_subgraph(%arg0: i32, %arg1: i32) attributes {allocation.offset %1 = llvm.getelementptr %0[%arg0] : (!llvm.ptr<3>, i32) -> !llvm.ptr<3>, i32 %2 = llvm.add %arg0, %arg1 : i32 %3 = llvm.mul %2, %arg1 : i32 - %4 = llvm.udiv %2, %3 : i32 + %4 = llvm.urem %2, %3 : i32 ttg.warp_specialize(%1, %4) attributes {allocation.offset = 0 : i32, warpGroupStartIds = array} default { ttg.warp_yield @@ -663,9 +663,9 @@ llvm.func @remat_subgraph(%arg0: i32, %arg1: i32) attributes {allocation.offset // CHECK-NEXT: "llvm.nvvm.barrier.cta.sync.all"([[C1]]) // CHECK-NEXT: [[ADD:%.*]] = llvm.add %arg0, %arg1 : i32 // CHECK-NEXT: [[MUL:%.*]] = llvm.mul [[ADD]], %arg1 : i32 - // CHECK-NEXT: [[UDIV:%.*]] = llvm.udiv [[ADD]], [[MUL]] : i32 + // CHECK-NEXT: [[UREM:%.*]] = llvm.urem [[ADD]], [[MUL]] : i32 // CHECK-NEXT: [[PTR:%.*]] = llvm.getelementptr [[ADDR]][%arg0] - // CHECK-NEXT: "use"([[PTR]], [[UDIV]]) + // CHECK-NEXT: "use"([[PTR]], [[UREM]]) "use"(%arg2, %arg3) : (!llvm.ptr<3>, i32) -> () // CHECK-NEXT: "llvm.nvvm.barrier.cta.sync.all"([[C1]]) ttg.warp_return