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#61: add fast_context.h module
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‎internal/fast_context.h‎

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/*
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+----------------------------------------------------------------------+
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| Copyright (c) The PHP Group |
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+----------------------------------------------------------------------+
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| This source file is subject to version 3.01 of the PHP license, |
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| that is bundled with this package in the file LICENSE, and is |
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| available through the world-wide-web at the following url: |
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| https://www.php.net/license/3_01.txt |
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| If you did not receive a copy of the PHP license and are unable to |
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| obtain it through the world-wide-web, please send a note to |
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| [email protected] so we can mail you a copy immediately. |
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+----------------------------------------------------------------------+
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| Author: Edmond |
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+----------------------------------------------------------------------+
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*/
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#ifndef FAST_CONTEXT_H
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#define FAST_CONTEXT_H
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/**
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* Fast Context Switching - Based on Alibaba Photon
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* Ultra-fast context switching for all platforms
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* Supports GCC, Clang, MSVC
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*/
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/* ===== COMPILER DETECTION ===== */
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#if defined(_MSC_VER)
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#define FASTCTX_MSVC 1
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#define FASTCTX_NAKED __declspec(naked)
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#define FASTCTX_INLINE __forceinline
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#define FASTCTX_ASM_FUNCTION FASTCTX_NAKED
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#elif defined(__clang__)
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#define FASTCTX_CLANG 1
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#define FASTCTX_NAKED __attribute__((naked))
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#define FASTCTX_INLINE static inline
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/* For inline assembly functions, naked is more important than inline */
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#define FASTCTX_ASM_FUNCTION __attribute__((naked, noinline))
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#elif defined(__GNUC__)
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#define FASTCTX_GCC 1
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#define FASTCTX_NAKED __attribute__((naked))
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#define FASTCTX_INLINE static inline
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/* For inline assembly functions, naked is more important than inline */
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#define FASTCTX_ASM_FUNCTION __attribute__((naked, noinline))
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#else
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#define FASTCTX_UNKNOWN 1
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#define FASTCTX_NAKED
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#define FASTCTX_INLINE static inline
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#define FASTCTX_ASM_FUNCTION static
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#endif
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/* ===== C++ COMPATIBILITY ===== */
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* ===== INTEL CET (Control-flow Enforcement Technology) DETECTION ===== */
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#if defined(__CET__)
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#include <cet.h>
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/* Intel CET has two features:
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* - IBT (Indirect Branch Tracking): __CET__ & 0x1
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* - SHSTK (Shadow Stack): __CET__ & 0x2
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* We only need Shadow Stack for context switching */
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#define FASTCTX_IBT_ENABLED (__CET__ & 0x1)
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#define FASTCTX_SHSTK_ENABLED (__CET__ & 0x2)
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/* Check if both compile-time and runtime support are available */
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#if FASTCTX_SHSTK_ENABLED && defined(SHADOW_STACK_SYSCALL)
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#define FASTCTX_CET 1
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#else
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#define FASTCTX_CET 0
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#endif
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#else
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/* No CET support - define empty macros */
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#define _CET_ENDBR
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#define FASTCTX_CET 0
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#define FASTCTX_IBT_ENABLED 0
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#define FASTCTX_SHSTK_ENABLED 0
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#endif
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/* ===== CONTEXT STRUCTURE ===== */
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#if !defined(FASTCTX_FALLBACK_SETJMP)
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typedef struct {
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void *stack_ptr;
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} coroutine_context;
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#endif
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/* Forward declaration for all platforms */
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/* Note: actual function is defined inline for each platform below */
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// x86_64
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#if defined(__x86_64__) || defined(_M_X64)
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#ifdef FASTCTX_MSVC
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/* MSVC x64 calling convention: RCX, RDX, R8, R9
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* Microsoft x64 callee-saved: RBP, RBX, RDI, RSI, R12-R15 */
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FASTCTX_NAKED void fast_context_switch(coroutine_context *from, coroutine_context *to) {
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__asm {
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; Save Microsoft x64 callee-saved registers (like Photon)
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push rbp
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push rbx
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push rdi
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push rsi
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push r12
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push r13
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push r14
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push r15
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mov [rcx], rsp ; from->stack_ptr = rsp
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mov rsp, [rdx] ; rsp = to->stack_ptr
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; Restore Microsoft x64 callee-saved registers
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pop r15
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pop r14
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pop r13
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pop r12
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pop rsi
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pop rdi
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pop rbx
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pop rbp
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ret
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}
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}
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#else
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/* GCC/Clang x64 calling convention: RDI, RSI */
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FASTCTX_ASM_FUNCTION void fast_context_switch(coroutine_context *from, coroutine_context *to)
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{
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#if FASTCTX_CET
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__asm__ volatile(
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"_CET_ENDBR\n" /* IBT: Mark as valid indirect branch target */
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/* Save Shadow Stack Pointer (for SHSTK) */
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"rdsspq %%rcx\n" /* Read current Shadow Stack Pointer */
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"pushq %%rcx\n" /* Save SSP to current stack */
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/* Standard context switch - save System V callee-saved registers */
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"pushq %%rbp\n" /* Save frame pointer */
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"pushq %%rbx\n" /* Save callee-saved */
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"pushq %%r12\n" /* Save callee-saved */
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"pushq %%r13\n" /* Save callee-saved */
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"pushq %%r14\n" /* Save callee-saved */
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"pushq %%r15\n" /* Save callee-saved */
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"movq %%rsp, (%0)\n" /* from->stack_ptr = current rsp */
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"movq (%1), %%rsp\n" /* rsp = to->stack_ptr (switch stacks) */
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"popq %%r15\n" /* Restore callee-saved */
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"popq %%r14\n" /* Restore callee-saved */
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"popq %%r13\n" /* Restore callee-saved */
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"popq %%r12\n" /* Restore callee-saved */
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"popq %%rbx\n" /* Restore callee-saved */
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"popq %%rbp\n" /* Restore frame pointer */
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/* Restore Shadow Stack (for SHSTK) */
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"popq %%rcx\n" /* Load SSP from new stack */
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"test %%rcx, %%rcx\n" /* Check if SSP is non-zero */
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"jz 1f\n" /* Skip if zero (no shadow stack) */
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"rstorssp -8(%%rcx)\n" /* Restore shadow stack from token */
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"saveprevssp\n" /* Save token for previous shadow stack */
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/* CRITICAL: Since we use 'ret' instead of 'jmp', we need to adjust SSP
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* because 'ret' will decrement SSP but we haven't actually returned
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* from a function call - we're jumping to a different context */
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"incsspq $1\n" /* Increment SSP to compensate */
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"1:\n"
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"ret\n" /* Return to new context */
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: : "r"(from), "r"(to) : "rcx", "memory"
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);
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#else
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__asm__ volatile(
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/* Save System V AMD64 callee-saved registers (like Photon) */
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"pushq %%rbp\n"
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"pushq %%rbx\n"
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"pushq %%r12\n"
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"pushq %%r13\n"
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"pushq %%r14\n"
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"pushq %%r15\n"
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"movq %%rsp, (%0)\n"
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"movq (%1), %%rsp\n"
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/* Restore System V AMD64 callee-saved registers */
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"popq %%r15\n"
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"popq %%r14\n"
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"popq %%r13\n"
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"popq %%r12\n"
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"popq %%rbx\n"
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"popq %%rbp\n"
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"ret\n"
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: : "r"(from), "r"(to) : "memory"
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);
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#endif
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}
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#endif
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// ARM64
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#elif defined(__aarch64__) || defined(_M_ARM64)
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#ifdef FASTCTX_MSVC
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/*
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* MSVC ARM64 LIMITATION:
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*
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* Microsoft Visual C++ does NOT support inline assembly on ARM64,
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* unlike x86/x64 where __asm blocks are supported. This is because:
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*
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* 1. ARM64 ABI COMPLEXITY: The ARM64 calling convention is more complex
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* than x86/x64, with different register classes and stricter alignment
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*
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* 2. MICROSOFT'S DESIGN DECISION: MSVC encourages use of compiler intrinsics
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* rather than inline assembly for better optimization and security
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*
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* 3. TOOLCHAIN SEPARATION: Microsoft separates assembly code into dedicated
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* .asm files processed by armasm64.exe assembler
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*
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* SOLUTION:
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* We provide the context switching function in a separate .asm file:
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* 'fast_context_arm64_msvc.asm' which must be:
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* 1. Assembled with armasm64.exe
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* 2. Linked with the main program
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* 3. Declared as external function here
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*
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* BUILD INSTRUCTIONS:
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* armasm64.exe fast_context_arm64_msvc.asm
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* link.exe your_program.obj fast_context_arm64_msvc.obj
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*/
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/* External function declaration - implemented in fast_context_arm64_msvc.asm */
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extern void fast_context_switch(coroutine_context *from, coroutine_context *to);
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#else
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/* GCC/Clang ARM64 - supports inline assembly */
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FASTCTX_ASM_FUNCTION void fast_context_switch(coroutine_context *from, coroutine_context *to) {
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__asm__ volatile(
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"stp x29, x30, [sp, #-16]!\n" /* Save FP and LR to current stack */
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"mov x29, sp\n" /* Update frame pointer */
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"str x29, [%0]\n" /* from->stack_ptr = current stack */
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"ldr x29, [%1]\n" /* Load new stack pointer */
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"mov sp, x29\n" /* Switch to new stack */
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"ldp x29, x30, [sp], #16\n" /* Restore FP and LR from new stack */
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"ret\n" /* Return to new context */
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: : "r"(from), "r"(to) : "x29", "x30", "memory"
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);
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}
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#endif
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// RISC-V 64
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#elif defined(__riscv) && (__riscv_xlen == 64)
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FASTCTX_ASM_FUNCTION void fast_context_switch(coroutine_context *from, coroutine_context *to) {
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__asm__ volatile(
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"addi sp, sp, -16\n"
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"sd ra, 8(sp)\n"
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"sd s0, 0(sp)\n"
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"sd sp, 0(%0)\n"
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"ld sp, 0(%1)\n"
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"ld s0, 0(sp)\n"
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"ld ra, 8(sp)\n"
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"addi sp, sp, 16\n"
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"jr ra\n"
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: : "r"(from), "r"(to) : "memory"
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);
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}
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// ARM32
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#elif defined(__arm__) || defined(_M_ARM)
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FASTCTX_ASM_FUNCTION void fast_context_switch(coroutine_context *from, coroutine_context *to) {
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__asm__ volatile(
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"push {r11, lr}\n"
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"mov r11, sp\n"
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"str r11, [%0]\n"
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"ldr r11, [%1]\n"
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"mov sp, r11\n"
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"pop {r11, pc}\n"
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: : "r"(from), "r"(to) : "r11", "lr", "memory"
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);
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}
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// x86_32
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#elif defined(__i386__) || defined(_M_IX86)
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#ifdef FASTCTX_MSVC
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/* MSVC x86 calling convention: parameters on stack */
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FASTCTX_NAKED void fast_context_switch(coroutine_context *from, coroutine_context *to) {
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__asm {
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push ebp ; Save frame pointer
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mov eax, [esp+8] ; eax = from parameter (after push ebp)
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mov edx, [esp+12] ; edx = to parameter (after push ebp)
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mov [eax], esp ; from->stack_ptr = current esp
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mov esp, [edx] ; switch to new stack
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pop ebp ; restore frame pointer from new stack
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ret ; return to new context
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}
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}
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#else
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FASTCTX_ASM_FUNCTION void fast_context_switch(coroutine_context *from, coroutine_context *to) {
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__asm__ volatile(
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"pushl %%ebp\n"
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"movl %%esp, (%0)\n"
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"movl (%1), %%esp\n"
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"popl %%ebp\n"
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"ret\n"
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: : "r"(from), "r"(to) : "memory"
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);
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}
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#endif
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#else
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/* ===== FALLBACK FOR UNSUPPORTED PLATFORMS ===== */
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#define FASTCTX_FALLBACK_SETJMP 1
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#include <setjmp.h>
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#ifdef FASTCTX_FALLBACK_SETJMP
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#undef coroutine_context /* Remove previous declaration */
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typedef struct {
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jmp_buf ctx;
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int initialized;
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} coroutine_context;
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#endif
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FASTCTX_INLINE void fast_context_switch(coroutine_context *from, coroutine_context *to) {
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if (setjmp(from->ctx) == 0) {
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longjmp(to->ctx, 1);
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}
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}
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#if defined(__GNUC__) || defined(__clang__)
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#warning "Using setjmp/longjmp fallback - performance will be reduced"
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#elif defined(_MSC_VER)
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#pragma message("Using setjmp/longjmp fallback - performance will be reduced")
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#endif
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#endif
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#ifdef __cplusplus
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}
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#endif
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#endif /* FAST_CONTEXT_H */

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