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| 1 | +import { test, expect } from "bun:test" |
| 2 | +import { circuitJsonToSpice } from "lib/circuitJsonToSpice" |
| 3 | +import type { AnyCircuitElement } from "circuit-json" |
| 4 | + |
| 5 | +test("simulation op amp", () => { |
| 6 | + const circuitJson: AnyCircuitElement[] = [ |
| 7 | + { |
| 8 | + type: "source_port", |
| 9 | + source_port_id: "U1_non_inverting_input", |
| 10 | + name: "non_inverting_input", |
| 11 | + }, |
| 12 | + { |
| 13 | + type: "source_port", |
| 14 | + source_port_id: "U1_inverting_input", |
| 15 | + name: "inverting_input", |
| 16 | + }, |
| 17 | + { |
| 18 | + type: "source_port", |
| 19 | + source_port_id: "U1_positive_supply", |
| 20 | + name: "positive_supply", |
| 21 | + }, |
| 22 | + { |
| 23 | + type: "source_port", |
| 24 | + source_port_id: "U1_negative_supply", |
| 25 | + name: "negative_supply", |
| 26 | + }, |
| 27 | + { |
| 28 | + type: "source_port", |
| 29 | + source_port_id: "U1_output", |
| 30 | + name: "output", |
| 31 | + }, |
| 32 | + { |
| 33 | + type: "simulation_op_amp", |
| 34 | + simulation_op_amp_id: "sim_op_amp_1", |
| 35 | + inverting_input_source_port_id: "U1_inverting_input", |
| 36 | + non_inverting_input_source_port_id: "U1_non_inverting_input", |
| 37 | + output_source_port_id: "U1_output", |
| 38 | + positive_supply_source_port_id: "U1_positive_supply", |
| 39 | + negative_supply_source_port_id: "U1_negative_supply", |
| 40 | + }, |
| 41 | + ] |
| 42 | + |
| 43 | + const netlist = circuitJsonToSpice(circuitJson) |
| 44 | + const spiceString = netlist.toSpiceString() |
| 45 | + |
| 46 | + expect(spiceString).toContain(".SUBCKT GENERIC_OPAMP") |
| 47 | + expect(spiceString).toContain("Xsim_op_amp_1 N1 N2 N3 N4 N5 GENERIC_OPAMP") |
| 48 | + expect(spiceString).toMatchInlineSnapshot(` |
| 49 | + "* Circuit JSON to SPICE Netlist |
| 50 | + .SUBCKT GENERIC_OPAMP non_inverting_input inverting_input positive_supply negative_supply output |
| 51 | + * Generic Op-Amp Model |
| 52 | + E1 internal_output 0 non_inverting_input inverting_input 100k |
| 53 | + Rin non_inverting_input inverting_input 10Meg |
| 54 | + Rout internal_output output 75 |
| 55 | + D1 output positive_supply opamp_diode |
| 56 | + D2 negative_supply output opamp_diode |
| 57 | + .model opamp_diode D |
| 58 | + .ENDS GENERIC_OPAMP |
| 59 | + Xsim_op_amp_1 N1 N2 N3 N4 N5 GENERIC_OPAMP |
| 60 | + .END" |
| 61 | + `) |
| 62 | +}) |
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