Tomsaulo: Add FP shims, L0 cache, LQ bug fixes, and full test infrastructure

LQ bug fixes:
- Fix stale response after partial flush: drain approach discards late
  memory responses to flushed entries instead of writing stale data
- Fix tail reclamation after partial flush: retract tail_ptr backwards
  past invalidated entries so LQ doesn't falsely appear full
- Fix L0 cache concurrent fill/invalidate race at same index: suppress
  invalidation when a concurrent fill targets the same cache line

New modules:
- lq_l0_cache: direct-mapped L0 data cache for LQ with combinational
  lookup, fill-on-response, MMIO bypass, and flush support
- fp_add_shim: FP add/sub, compare, classify, sign-inject, convert
  operations via 5 subunits (CDB slot 4)
- fp_mul_shim: FP multiply and fused multiply-add operations via
  mult_unit and fp_fma subunits (CDB slot 5)
- fp_div_shim: FP divide and square root operations via
  fpu_div_sqrt_unit (CDB slot 6)

Wrapper integration:
- Wire FP shims into tomasulo_wrapper CDB slots 4-6 with fu_cdb_adapter
  instances and priority mux (internal shim vs external injection)
- Connect FP RS issue outputs to corresponding shims
- Gate FP RS fu_ready on adapter pending + shim busy
- Add ICARUS guards to stub FP shims (revert to external ports)

Test infrastructure:
- 19 new FP shim cocotb tests (8 add + 6 mul + 5 div)
- 5 new LQ tests (stale response, tail reclamation, cache hit/miss/MMIO)
- 4 new formal targets (fp_add_shim, fp_mul_shim, fp_div_shim, lq_l0_cache)
- All 81 cocotb tests passing, all 12 formal targets passing

Author: adambagley

formal/fp_add_shim.sby

@@ -0,0 +1,55 @@
+[tasks]
+bmc
+cover
+
+[options]
+bmc: mode bmc
+bmc: depth 16
+cover: mode cover
+cover: depth 20
+
+[engines]
+smtbmc boolector
+
+[script]
+read -formal -sv riscv_pkg.sv
+read -sv fp_lzc.sv
+read -sv fp_classify_operand.sv
+read -sv fp_operand_unpacker.sv
+read -sv fp_subnorm_shift.sv
+read -sv fp_result_assembler.sv
+read -sv fp_sign_inject.sv
+read -sv fp_classify.sv
+read -sv fp_compare.sv
+read -sv fp_convert.sv
+read -sv fp_convert_sd.sv
+read -sv fp_adder.sv
+read -sv fp_multiplier.sv
+read -sv fpu_adder_unit.sv
+read -sv fpu_compare_unit.sv
+read -sv fpu_classify_unit.sv
+read -sv fpu_sign_inject_unit.sv
+read -sv fpu_convert_unit.sv
+read -formal -sv fp_add_shim.sv
+prep -top fp_add_shim
+
+[files]
+../hw/rtl/cpu_and_mem/cpu/riscv_pkg.sv
+../hw/rtl/cpu_and_mem/cpu/ex_stage/fpu/fp_lzc.sv
+../hw/rtl/cpu_and_mem/cpu/ex_stage/fpu/fp_classify_operand.sv
+../hw/rtl/cpu_and_mem/cpu/ex_stage/fpu/fp_operand_unpacker.sv
+../hw/rtl/cpu_and_mem/cpu/ex_stage/fpu/fp_subnorm_shift.sv
+../hw/rtl/cpu_and_mem/cpu/ex_stage/fpu/fp_result_assembler.sv
+../hw/rtl/cpu_and_mem/cpu/ex_stage/fpu/fp_sign_inject.sv
+../hw/rtl/cpu_and_mem/cpu/ex_stage/fpu/fp_classify.sv
+../hw/rtl/cpu_and_mem/cpu/ex_stage/fpu/fp_compare.sv
+../hw/rtl/cpu_and_mem/cpu/ex_stage/fpu/fp_convert.sv
+../hw/rtl/cpu_and_mem/cpu/ex_stage/fpu/fp_convert_sd.sv
+../hw/rtl/cpu_and_mem/cpu/ex_stage/fpu/fp_adder.sv
+../hw/rtl/cpu_and_mem/cpu/ex_stage/fpu/fp_multiplier.sv
+../hw/rtl/cpu_and_mem/cpu/ex_stage/fpu/fpu_adder_unit.sv
+../hw/rtl/cpu_and_mem/cpu/ex_stage/fpu/fpu_compare_unit.sv
+../hw/rtl/cpu_and_mem/cpu/ex_stage/fpu/fpu_classify_unit.sv
+../hw/rtl/cpu_and_mem/cpu/ex_stage/fpu/fpu_sign_inject_unit.sv
+../hw/rtl/cpu_and_mem/cpu/ex_stage/fpu/fpu_convert_unit.sv
+../hw/rtl/cpu_and_mem/cpu/tomasulo/fu_shims/fp_add_shim.sv

formal/fp_div_shim.sby

@@ -0,0 +1,37 @@
+[tasks]
+bmc
+cover
+
+[options]
+bmc: mode bmc
+bmc: depth 40
+cover: mode cover
+cover: depth 50
+
+[engines]
+smtbmc boolector
+
+[script]
+read -formal -sv riscv_pkg.sv
+read -sv fp_lzc.sv
+read -sv fp_classify_operand.sv
+read -sv fp_operand_unpacker.sv
+read -sv fp_subnorm_shift.sv
+read -sv fp_result_assembler.sv
+read -sv fp_divider.sv
+read -sv fp_sqrt.sv
+read -sv fpu_div_sqrt_unit.sv
+read -formal -sv fp_div_shim.sv
+prep -top fp_div_shim
+
+[files]
+../hw/rtl/cpu_and_mem/cpu/riscv_pkg.sv
+../hw/rtl/cpu_and_mem/cpu/ex_stage/fpu/fp_lzc.sv
+../hw/rtl/cpu_and_mem/cpu/ex_stage/fpu/fp_classify_operand.sv
+../hw/rtl/cpu_and_mem/cpu/ex_stage/fpu/fp_operand_unpacker.sv
+../hw/rtl/cpu_and_mem/cpu/ex_stage/fpu/fp_subnorm_shift.sv
+../hw/rtl/cpu_and_mem/cpu/ex_stage/fpu/fp_result_assembler.sv
+../hw/rtl/cpu_and_mem/cpu/ex_stage/fpu/fp_divider.sv
+../hw/rtl/cpu_and_mem/cpu/ex_stage/fpu/fp_sqrt.sv
+../hw/rtl/cpu_and_mem/cpu/ex_stage/fpu/fpu_div_sqrt_unit.sv
+../hw/rtl/cpu_and_mem/cpu/tomasulo/fu_shims/fp_div_shim.sv

formal/fp_mul_shim.sby

@@ -0,0 +1,43 @@
+[tasks]
+bmc
+cover
+
+[options]
+bmc: mode bmc
+bmc: depth 16
+cover: mode cover
+cover: depth 20
+
+[engines]
+smtbmc boolector
+
+[script]
+read -formal -sv riscv_pkg.sv
+read -sv fp_lzc.sv
+read -sv fp_classify_operand.sv
+read -sv fp_operand_unpacker.sv
+read -sv fp_subnorm_shift.sv
+read -sv fp_result_assembler.sv
+read -sv fp_multiplier.sv
+read -sv fp_adder.sv
+read -sv fp_fma.sv
+read -sv fpu_mult_unit.sv
+read -sv fpu_fma_unit.sv
+read -sv dsp_tiled_multiplier_unsigned.sv
+read -formal -sv fp_mul_shim.sv
+prep -top fp_mul_shim
+
+[files]
+../hw/rtl/cpu_and_mem/cpu/riscv_pkg.sv
+../hw/rtl/cpu_and_mem/cpu/ex_stage/fpu/fp_lzc.sv
+../hw/rtl/cpu_and_mem/cpu/ex_stage/fpu/fp_classify_operand.sv
+../hw/rtl/cpu_and_mem/cpu/ex_stage/fpu/fp_operand_unpacker.sv
+../hw/rtl/cpu_and_mem/cpu/ex_stage/fpu/fp_subnorm_shift.sv
+../hw/rtl/cpu_and_mem/cpu/ex_stage/fpu/fp_result_assembler.sv
+../hw/rtl/cpu_and_mem/cpu/ex_stage/fpu/fp_multiplier.sv
+../hw/rtl/cpu_and_mem/cpu/ex_stage/fpu/fp_adder.sv
+../hw/rtl/cpu_and_mem/cpu/ex_stage/fpu/fp_fma.sv
+../hw/rtl/cpu_and_mem/cpu/ex_stage/fpu/fpu_mult_unit.sv
+../hw/rtl/cpu_and_mem/cpu/ex_stage/fpu/fpu_fma_unit.sv
+../hw/rtl/cpu_and_mem/cpu/ex_stage/dsp_tiled_multiplier_unsigned.sv
+../hw/rtl/cpu_and_mem/cpu/tomasulo/fu_shims/fp_mul_shim.sv

formal/load_queue.sby

@@ -14,10 +14,12 @@ smtbmc boolector
 [script]
 read -formal -sv riscv_pkg.sv
 read -sv load_unit.sv
+read -sv lq_l0_cache.sv
 read -formal -sv load_queue.sv
 prep -top load_queue
 
 [files]
 ../hw/rtl/cpu_and_mem/cpu/riscv_pkg.sv
 ../hw/rtl/cpu_and_mem/cpu/ma_stage/load_unit.sv
+../hw/rtl/cpu_and_mem/cpu/tomasulo/load_queue/lq_l0_cache.sv
 ../hw/rtl/cpu_and_mem/cpu/tomasulo/load_queue/load_queue.sv

formal/lq_l0_cache.sby

@@ -0,0 +1,21 @@
+[tasks]
+bmc
+cover
+
+[options]
+bmc: mode bmc
+bmc: depth 8
+cover: mode cover
+cover: depth 12
+
+[engines]
+smtbmc boolector
+
+[script]
+read -formal -sv riscv_pkg.sv
+read -formal -sv lq_l0_cache.sv
+prep -top lq_l0_cache
+
+[files]
+../hw/rtl/cpu_and_mem/cpu/riscv_pkg.sv
+../hw/rtl/cpu_and_mem/cpu/tomasulo/load_queue/lq_l0_cache.sv

formal/tomasulo_wrapper.sby

@@ -23,11 +23,38 @@ read -sv fu_cdb_adapter.sv
 read -sv int_alu_shim.sv
 read -sv int_muldiv_shim.sv
 read -sv load_unit.sv
+read -sv lq_l0_cache.sv
 read -sv load_queue.sv
 read -sv divider.sv
 read -sv dsp_tiled_multiplier_unsigned.sv
 read -sv multiplier.sv
 read -sv alu.sv
+read -sv fp_lzc.sv
+read -sv fp_classify_operand.sv
+read -sv fp_operand_unpacker.sv
+read -sv fp_subnorm_shift.sv
+read -sv fp_result_assembler.sv
+read -sv fp_sign_inject.sv
+read -sv fp_classify.sv
+read -sv fp_compare.sv
+read -sv fp_convert.sv
+read -sv fp_convert_sd.sv
+read -sv fp_adder.sv
+read -sv fp_multiplier.sv
+read -sv fp_divider.sv
+read -sv fp_sqrt.sv
+read -sv fp_fma.sv
+read -sv fpu_adder_unit.sv
+read -sv fpu_mult_unit.sv
+read -sv fpu_fma_unit.sv
+read -sv fpu_compare_unit.sv
+read -sv fpu_sign_inject_unit.sv
+read -sv fpu_classify_unit.sv
+read -sv fpu_div_sqrt_unit.sv
+read -sv fpu_convert_unit.sv
+read -sv fp_add_shim.sv
+read -sv fp_mul_shim.sv
+read -sv fp_div_shim.sv
 read -formal -sv tomasulo_wrapper.sv
 prep -top tomasulo_wrapper
 
@@ -43,9 +70,36 @@ prep -top tomasulo_wrapper
 ../hw/rtl/cpu_and_mem/cpu/tomasulo/fu_shims/int_alu_shim.sv
 ../hw/rtl/cpu_and_mem/cpu/tomasulo/fu_shims/int_muldiv_shim.sv
 ../hw/rtl/cpu_and_mem/cpu/ma_stage/load_unit.sv
+../hw/rtl/cpu_and_mem/cpu/tomasulo/load_queue/lq_l0_cache.sv
 ../hw/rtl/cpu_and_mem/cpu/tomasulo/load_queue/load_queue.sv
 ../hw/rtl/cpu_and_mem/cpu/ex_stage/alu/divider.sv
 ../hw/rtl/cpu_and_mem/cpu/ex_stage/dsp_tiled_multiplier_unsigned.sv
 ../hw/rtl/cpu_and_mem/cpu/ex_stage/alu/multiplier.sv
 ../hw/rtl/cpu_and_mem/cpu/ex_stage/alu/alu.sv
+../hw/rtl/cpu_and_mem/cpu/ex_stage/fpu/fp_lzc.sv
+../hw/rtl/cpu_and_mem/cpu/ex_stage/fpu/fp_classify_operand.sv
+../hw/rtl/cpu_and_mem/cpu/ex_stage/fpu/fp_operand_unpacker.sv
+../hw/rtl/cpu_and_mem/cpu/ex_stage/fpu/fp_subnorm_shift.sv
+../hw/rtl/cpu_and_mem/cpu/ex_stage/fpu/fp_result_assembler.sv
+../hw/rtl/cpu_and_mem/cpu/ex_stage/fpu/fp_sign_inject.sv
+../hw/rtl/cpu_and_mem/cpu/ex_stage/fpu/fp_classify.sv
+../hw/rtl/cpu_and_mem/cpu/ex_stage/fpu/fp_compare.sv
+../hw/rtl/cpu_and_mem/cpu/ex_stage/fpu/fp_convert.sv
+../hw/rtl/cpu_and_mem/cpu/ex_stage/fpu/fp_convert_sd.sv
+../hw/rtl/cpu_and_mem/cpu/ex_stage/fpu/fp_adder.sv
+../hw/rtl/cpu_and_mem/cpu/ex_stage/fpu/fp_multiplier.sv
+../hw/rtl/cpu_and_mem/cpu/ex_stage/fpu/fp_divider.sv
+../hw/rtl/cpu_and_mem/cpu/ex_stage/fpu/fp_sqrt.sv
+../hw/rtl/cpu_and_mem/cpu/ex_stage/fpu/fp_fma.sv
+../hw/rtl/cpu_and_mem/cpu/ex_stage/fpu/fpu_adder_unit.sv
+../hw/rtl/cpu_and_mem/cpu/ex_stage/fpu/fpu_mult_unit.sv
+../hw/rtl/cpu_and_mem/cpu/ex_stage/fpu/fpu_fma_unit.sv
+../hw/rtl/cpu_and_mem/cpu/ex_stage/fpu/fpu_compare_unit.sv
+../hw/rtl/cpu_and_mem/cpu/ex_stage/fpu/fpu_sign_inject_unit.sv
+../hw/rtl/cpu_and_mem/cpu/ex_stage/fpu/fpu_classify_unit.sv
+../hw/rtl/cpu_and_mem/cpu/ex_stage/fpu/fpu_div_sqrt_unit.sv
+../hw/rtl/cpu_and_mem/cpu/ex_stage/fpu/fpu_convert_unit.sv
+../hw/rtl/cpu_and_mem/cpu/tomasulo/fu_shims/fp_add_shim.sv
+../hw/rtl/cpu_and_mem/cpu/tomasulo/fu_shims/fp_mul_shim.sv
+../hw/rtl/cpu_and_mem/cpu/tomasulo/fu_shims/fp_div_shim.sv
 ../hw/rtl/cpu_and_mem/cpu/tomasulo/tomasulo_wrapper/tomasulo_wrapper.sv