Skip to content

Commit e9c0381

Browse files
committed
tests(load_queue): model L0 cache fast-path in constrained-random
The load_queue constrained-random test could fail deterministically under Verilator (e.g. seed 1772249751) with a DUT/model count mismatch. Root cause: - DUT can complete a load via L0 cache fast-path without issuing a memory read. - The Python LQ model in constrained-random only modeled the mem-read issue path, so model state lagged DUT when cache-hit completion occurred. Fix: - Add `cache_hit_complete()` to `LQModel` to mirror DUT cache-hit behavior. - Update `test_constrained_random` to call model cache-hit completion when DUT `cache_hit_fast_path` is asserted, otherwise use normal mem-issue path. Result: - Reproduced failing seed now passes. - Full `load_queue` cocotb suite passes for the same command/seed.
1 parent ee25bbf commit e9c0381

File tree

2 files changed

+23
-1
lines changed

2 files changed

+23
-1
lines changed

verif/cocotb_tests/tomasulo/load_queue/lq_model.py

Lines changed: 20 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -242,6 +242,26 @@ def apply_forward(self, sq_forward: SQForwardResult) -> None:
242242
e.forwarded = True
243243
e.data = sq_forward.data & MASK64
244244

245+
def cache_hit_complete(self) -> None:
246+
"""Model DUT cache-hit fast path for the current Phase B candidate.
247+
248+
On an L0 cache hit, the DUT marks the candidate's data as valid without
249+
issuing a memory request.
250+
"""
251+
_, mem_idx = self._issue_scan()
252+
if mem_idx is None:
253+
return
254+
255+
e = self.entries[mem_idx]
256+
257+
# Mirror load_queue.sv cache_hit_fast_path gating.
258+
if e.is_mmio:
259+
return
260+
if e.is_fp and e.size == MEM_SIZE_DOUBLE:
261+
return
262+
263+
e.data_valid = True
264+
245265
def issue_to_memory(
246266
self, all_older_known: bool, sq_forward: SQForwardResult
247267
) -> dict | None:

verif/cocotb_tests/tomasulo/load_queue/test_load_queue.py

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -685,7 +685,9 @@ async def test_constrained_random(dut: Any) -> None:
685685
await Timer(1, unit="ns")
686686

687687
mem_req = dut_if.read_mem_request()
688-
if mem_req["en"]:
688+
if bool(dut.cache_hit_fast_path.value):
689+
model.cache_hit_complete()
690+
elif mem_req["en"]:
689691
model.issue_to_memory(True, SQForwardResult())
690692
await dut_if.step()
691693
dut_if.drive_sq_all_older_known(False)

0 commit comments

Comments
 (0)