1515
1616ADDR = 67
1717
18+ kwargs_target = {}
19+
1820# Configure pins based on the target.
1921if sys .platform == "alif" and sys .implementation ._build == "ALIF_ENSEMBLE" :
2022 args_controller = {"scl" : "P1_1" , "sda" : "P1_0" }
2123 args_target = (0 ,)
24+ elif sys .platform == "esp32" :
25+ # tested on UM_TINY_PICO
26+ # args_controller = {"scl": 14, "sda": 15}
27+ # args_target = (0,) # should be on 18/19
28+ # for s2 (UM_FEATHERS2)
29+ args_controller = {"scl" : 5 , "sda" : 6 }
30+ args_target = (0 ,) # should be on 18/19
31+ kwargs_target = {"scl" : 9 , "sda" : 8 }
2232elif sys .platform == "rp2" :
2333 args_controller = {"scl" : 5 , "sda" : 4 }
2434 args_target = (1 ,)
@@ -65,7 +75,7 @@ class TestMemory(unittest.TestCase):
6575 def setUpClass (cls ):
6676 cls .mem = bytearray (8 )
6777 cls .i2c = SoftI2C (** args_controller )
68- cls .i2c_target = I2CTarget (* args_target , addr = ADDR , mem = cls .mem )
78+ cls .i2c_target = I2CTarget (* args_target , ** kwargs_target , addr = ADDR , mem = cls .mem )
6979 config_pull_up ()
7080
7181 @classmethod
@@ -86,6 +96,10 @@ def test_write_wrap(self):
8696 self .mem [:] = b"01234567"
8797 self .i2c .writeto_mem (ADDR , 6 , b"test" )
8898 self .assertEqual (self .mem , bytearray (b"st2345te" ))
99+
100+ @unittest .skipIf (sys .platform == "esp32" , "write lengths larger than buffer unsupported" )
101+ def test_write_wrap_large (self ):
102+ self .mem [:] = b"01234567"
89103 self .i2c .writeto_mem (ADDR , 0 , b"testTESTmore" )
90104 self .assertEqual (self .mem , bytearray (b"moreTEST" ))
91105
@@ -99,9 +113,107 @@ def test_read_wrap(self):
99113 self .assertEqual (self .i2c .readfrom_mem (ADDR , 0 , 4 ), b"0123" )
100114 self .assertEqual (self .i2c .readfrom_mem (ADDR , 2 , 4 ), b"2345" )
101115 self .assertEqual (self .i2c .readfrom_mem (ADDR , 6 , 4 ), b"6701" )
116+
117+ @unittest .skipIf (sys .platform == "esp32" , "read lengths larger than buffer unsupported" )
118+ def test_read_wrap_large (self ):
119+ self .mem [:] = b"01234567"
102120 self .assertEqual (self .i2c .readfrom_mem (ADDR , 0 , 12 ), b"012345670123" )
103121
122+ def test_write_read (self ):
123+ self .mem [:] = b"01234567"
124+ self .assertEqual (self .i2c .writeto (ADDR , b"\x02 " ), 1 )
125+ self .assertEqual (self .i2c .readfrom (ADDR , 4 ), b"2345" )
126+
127+ @unittest .skipIf (sys .platform == "esp32" , "read after read unsupported" )
128+ def test_write_read_read (self ):
129+ self .mem [:] = b"01234567"
130+ self .assertEqual (self .i2c .writeto (ADDR , b"\x02 " ), 1 )
131+ self .assertEqual (self .i2c .readfrom (ADDR , 4 ), b"2345" )
132+ self .assertEqual (self .i2c .readfrom (ADDR , 4 ), b"7012" )
133+
134+
135+ @unittest .skipUnless (hasattr (I2CTarget , "IRQ_END_READ" ), "IRQ unsupported" )
136+ class TestMemoryIRQ (unittest .TestCase ):
137+ @staticmethod
138+ def irq_handler (i2c_target ):
139+ flags = i2c_target .irq ().flags ()
140+ TestMemoryIRQ .events [TestMemoryIRQ .num_events ] = flags
141+ TestMemoryIRQ .events [TestMemoryIRQ .num_events + 1 ] = i2c_target .memaddr ()
142+ TestMemoryIRQ .num_events += 2
143+
144+ @classmethod
145+ def setUpClass (cls ):
146+ cls .mem = bytearray (8 )
147+ cls .events = [0 ] * 8
148+ cls .num_events = 0
149+ cls .i2c = SoftI2C (** args_controller )
150+ cls .i2c_target = I2CTarget (* args_target , ** kwargs_target , addr = ADDR , mem = cls .mem )
151+ cls .i2c_target .irq (TestMemoryIRQ .irq_handler )
152+ config_pull_up ()
153+
154+ @classmethod
155+ def tearDownClass (cls ):
156+ cls .i2c_target .deinit ()
157+
158+ @unittest .skipIf (sys .platform == "esp32" , "scan doesn't trigger IRQ_END_WRITE" )
159+ def test_scan (self ):
160+ TestMemoryIRQ .num_events = 0
161+ self .i2c .scan ()
162+ self .assertEqual (self .events [: self .num_events ], [I2CTarget .IRQ_END_WRITE , 0 ])
163+
164+ def test_write (self ):
165+ TestMemoryIRQ .num_events = 0
166+ self .mem [:] = b"01234567"
167+ self .i2c .writeto_mem (ADDR , 2 , b"test" )
168+ self .assertEqual (self .mem , bytearray (b"01test67" ))
169+ self .assertEqual (self .events [: self .num_events ], [I2CTarget .IRQ_END_WRITE , 2 ])
170+
171+ def test_read (self ):
172+ TestMemoryIRQ .num_events = 0
173+ self .mem [:] = b"01234567"
174+ self .assertEqual (self .i2c .readfrom_mem (ADDR , 2 , 4 ), b"2345" )
175+ self .assertEqual (self .events [: self .num_events ], [I2CTarget .IRQ_END_READ , 2 ])
176+
177+
178+ @unittest .skipUnless (hasattr (I2CTarget , "IRQ_WRITE_REQ" ), "IRQ unsupported" )
179+ @unittest .skipIf (sys .platform == "pyboard" , "can't queue more than one byte " )
180+ class TestPolling (unittest .TestCase ):
181+ @staticmethod
182+ def irq_handler (i2c_target , buf = bytearray (1 )):
183+ flags = i2c_target .irq ().flags ()
184+ if flags & I2CTarget .IRQ_READ_REQ :
185+ i2c_target .write (b"0123" )
186+
187+ @classmethod
188+ def setUpClass (cls ):
189+ cls .i2c = SoftI2C (** args_controller )
190+ cls .i2c_target = I2CTarget (* args_target , addr = ADDR ) # , mem=mem)
191+ cls .i2c_target .irq (
192+ TestPolling .irq_handler ,
193+ I2CTarget .IRQ_WRITE_REQ | I2CTarget .IRQ_READ_REQ ,
194+ hard = True ,
195+ )
196+ config_pull_up ()
197+
198+ @classmethod
199+ def tearDownClass (cls ):
200+ cls .i2c_target .deinit ()
201+
202+ def test_read (self ):
203+ # doesn't work, queued data is lost
204+ self .assertEqual (self .i2c_target .write (b"abcd" ), 4 )
205+ # data is written via IRQ_READ_REQ
206+ self .assertEqual (self .i2c .readfrom (ADDR , 4 ), b"0123" )
207+
208+ def test_write (self ):
209+ # works, but requires IRQ_WRITE_REQ
210+ self .assertEqual (self .i2c .writeto (ADDR , b"0123" ), 4 )
211+ buf = bytearray (8 )
212+ self .assertEqual (self .i2c_target .readinto (buf ), 4 )
213+ self .assertEqual (buf , b"0123\x00 \x00 \x00 \x00 " )
214+
104215
216+ @unittest .skipUnless (hasattr (I2CTarget , "IRQ_ADDR_MATCH_READ" ), "IRQ unsupported" )
105217class TestIRQ (unittest .TestCase ):
106218 @staticmethod
107219 def irq_handler (i2c_target , buf = bytearray (1 )):
@@ -123,10 +235,12 @@ def setUpClass(cls):
123235 cls .i2c_target = I2CTarget (* args_target , addr = ADDR )
124236 cls .i2c_target .irq (
125237 TestIRQ .irq_handler ,
126- I2CTarget .IRQ_ADDR_MATCH
238+ I2CTarget .IRQ_ADDR_MATCH_READ
239+ | I2CTarget .IRQ_ADDR_MATCH_WRITE
127240 | I2CTarget .IRQ_WRITE_REQ
128241 | I2CTarget .IRQ_READ_REQ
129- | I2CTarget .IRQ_END ,
242+ | I2CTarget .IRQ_END_READ
243+ | I2CTarget .IRQ_END_WRITE ,
130244 hard = True ,
131245 )
132246 config_pull_up ()
@@ -141,8 +255,8 @@ def test_scan(self):
141255 self .assertEqual (
142256 self .events [: self .num_events ],
143257 [
144- I2CTarget .IRQ_ADDR_MATCH ,
145- I2CTarget .IRQ_END ,
258+ I2CTarget .IRQ_ADDR_MATCH_WRITE ,
259+ I2CTarget .IRQ_END_WRITE ,
146260 ],
147261 )
148262
@@ -152,14 +266,14 @@ def test_write(self):
152266 self .assertEqual (
153267 self .events [: self .num_events ],
154268 [
155- I2CTarget .IRQ_ADDR_MATCH ,
269+ I2CTarget .IRQ_ADDR_MATCH_WRITE ,
156270 I2CTarget .IRQ_WRITE_REQ ,
157271 ord (b"X" ),
158272 I2CTarget .IRQ_WRITE_REQ ,
159273 ord (b"Y" ),
160274 I2CTarget .IRQ_WRITE_REQ ,
161275 ord (b"Z" ),
162- I2CTarget .IRQ_END ,
276+ I2CTarget .IRQ_END_WRITE ,
163277 ],
164278 )
165279
@@ -169,10 +283,10 @@ def test_read(self):
169283 self .assertEqual (
170284 self .events [: self .num_events ],
171285 [
172- I2CTarget .IRQ_ADDR_MATCH ,
286+ I2CTarget .IRQ_ADDR_MATCH_READ ,
173287 I2CTarget .IRQ_READ_REQ ,
174288 I2CTarget .IRQ_READ_REQ ,
175- I2CTarget .IRQ_END ,
289+ I2CTarget .IRQ_END_READ ,
176290 ],
177291 )
178292
@@ -183,13 +297,14 @@ def test_write_read(self):
183297 self .assertEqual (
184298 self .events [: self .num_events ],
185299 [
186- I2CTarget .IRQ_ADDR_MATCH ,
300+ I2CTarget .IRQ_ADDR_MATCH_WRITE ,
187301 I2CTarget .IRQ_WRITE_REQ ,
188302 ord (b"X" ),
189- I2CTarget .IRQ_ADDR_MATCH ,
303+ I2CTarget .IRQ_END_WRITE ,
304+ I2CTarget .IRQ_ADDR_MATCH_READ ,
190305 I2CTarget .IRQ_READ_REQ ,
191306 I2CTarget .IRQ_READ_REQ ,
192- I2CTarget .IRQ_END ,
307+ I2CTarget .IRQ_END_READ ,
193308 ],
194309 )
195310
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