Skip to content

Commit 772a2fc

Browse files
dpgeorgedpgeorge
committed
alif/machine_i2c_target: Implement I2CTarget.
Signed-off-by: Damien George <[email protected]>
1 parent 850d390 commit 772a2fc

File tree

4 files changed

+282
-0
lines changed

4 files changed

+282
-0
lines changed

‎ports/alif/irq.h‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -49,6 +49,7 @@
4949
#define IRQ_PRI_HWSEM NVIC_EncodePriority(NVIC_PRIORITYGROUP_7, 8, 0)
5050
#define IRQ_PRI_GPU NVIC_EncodePriority(NVIC_PRIORITYGROUP_7, 10, 0)
5151
#define IRQ_PRI_GPIO NVIC_EncodePriority(NVIC_PRIORITYGROUP_7, 50, 0)
52+
#define IRQ_PRI_I2C NVIC_EncodePriority(NVIC_PRIORITYGROUP_7, 60, 0)
5253
#define IRQ_PRI_RTC NVIC_EncodePriority(NVIC_PRIORITYGROUP_7, 100, 0)
5354
#define IRQ_PRI_CYW43 NVIC_EncodePriority(NVIC_PRIORITYGROUP_7, 126, 0)
5455
#define IRQ_PRI_PENDSV NVIC_EncodePriority(NVIC_PRIORITYGROUP_7, 127, 0)

‎ports/alif/machine_i2c_target.c‎

Lines changed: 275 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,275 @@
1+
/*
2+
* This file is part of the MicroPython project, http://micropython.org/
3+
*
4+
* The MIT License (MIT)
5+
*
6+
* Copyright (c) 2025 Damien P. George
7+
*
8+
* Permission is hereby granted, free of charge, to any person obtaining a copy
9+
* of this software and associated documentation files (the "Software"), to deal
10+
* in the Software without restriction, including without limitation the rights
11+
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12+
* copies of the Software, and to permit persons to whom the Software is
13+
* furnished to do so, subject to the following conditions:
14+
*
15+
* The above copyright notice and this permission notice shall be included in
16+
* all copies or substantial portions of the Software.
17+
*
18+
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19+
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20+
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
21+
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22+
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23+
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
24+
* THE SOFTWARE.
25+
*/
26+
27+
// This file is never compiled standalone, it's included directly from
28+
// extmod/machine_i2c_target.c via MICROPY_PY_MACHINE_I2C_TARGET_INCLUDEFILE.
29+
30+
#include "i2c.h"
31+
32+
#define I2C_IC_CON_TX_EMPTY_CTRL (1 << 8)
33+
#define I2C_IC_CON_STOP_DET_IFADDRESSED (1 << 7)
34+
35+
typedef struct _machine_i2c_target_obj_t {
36+
mp_obj_base_t base;
37+
I2C_Type *i2c;
38+
uint32_t irq_num;
39+
mp_hal_pin_obj_t scl;
40+
mp_hal_pin_obj_t sda;
41+
uint8_t state;
42+
} machine_i2c_target_obj_t;
43+
44+
static machine_i2c_target_data_t i2c_target_data[4];
45+
46+
static machine_i2c_target_obj_t machine_i2c_target_obj[] = {
47+
#if defined(MICROPY_HW_I2C0_SCL)
48+
[0] = {{&machine_i2c_target_type}, (I2C_Type *)I2C0_BASE, I2C0_IRQ_IRQn, MICROPY_HW_I2C0_SCL, MICROPY_HW_I2C0_SDA},
49+
#endif
50+
#if defined(MICROPY_HW_I2C1_SCL)
51+
[1] = {{&machine_i2c_target_type}, (I2C_Type *)I2C1_BASE, I2C1_IRQ_IRQn, MICROPY_HW_I2C1_SCL, MICROPY_HW_I2C1_SDA},
52+
#endif
53+
#if defined(MICROPY_HW_I2C2_SCL)
54+
[2] = {{&machine_i2c_target_type}, (I2C_Type *)I2C2_BASE, I2C2_IRQ_IRQn, MICROPY_HW_I2C2_SCL, MICROPY_HW_I2C2_SDA},
55+
#endif
56+
#if defined(MICROPY_HW_I2C3_SCL)
57+
[3] = {{&machine_i2c_target_type}, (I2C_Type *)I2C3_BASE, I2C3_IRQ_IRQn, MICROPY_HW_I2C3_SCL, MICROPY_HW_I2C3_SDA},
58+
#endif
59+
};
60+
61+
/******************************************************************************/
62+
// Alif I2C hardware bindings
63+
//
64+
// The hardware triggers the following IRQs for the given scenarios:
65+
// - scan (0-byte write) of another target: START_DET
66+
// - scan (0-byte write) of us: START_DET STOP_DET
67+
// - write of n bytes: START_DET RX_FULL*n STOP_DET
68+
// - write of n bytes then read of m bytes: START_DET RX_FULL*n START_DET RD_REQ*m RX_DONE STOP_DET
69+
70+
static void i2c_target_irq_handler(machine_i2c_target_obj_t *self) {
71+
unsigned int i2c_id = self - &machine_i2c_target_obj[0];
72+
machine_i2c_target_data_t *data = &i2c_target_data[i2c_id];
73+
I2C_Type *i2c = self->i2c;
74+
75+
// Get the interrupt status.
76+
uint32_t intr_stat = i2c->I2C_RAW_INTR_STAT;
77+
78+
if (intr_stat & I2C_IC_INTR_STAT_TX_ABRT) {
79+
// Clear the TX_ABRT condition.
80+
(void)i2c->I2C_CLR_TX_ABRT;
81+
}
82+
83+
if (intr_stat & I2C_IC_INTR_STAT_RX_FULL) {
84+
// Data from controller is available for reading.
85+
// Mask interrupt until I2C_DATA_CMD is read from.
86+
i2c->I2C_INTR_MASK &= ~I2C_IC_INTR_STAT_RX_FULL;
87+
if (self->state != STATE_WRITING) {
88+
machine_i2c_target_data_addr_match(data, false);
89+
}
90+
machine_i2c_target_data_write_request(self, data);
91+
self->state = STATE_WRITING;
92+
}
93+
94+
if (intr_stat & (I2C_IC_INTR_STAT_RD_REQ | I2C_IC_INTR_STAT_RX_DONE)) {
95+
// Controller is requesting data.
96+
// Note: for RX_DONE interrupt, no data needs to be written but this event is
97+
// needed to match the expected I2CTarget event behaviour. A TX_ABTR interrupt
98+
// will be fired after the unused byte is written to I2C_DATA_CMD, and clearing
99+
// that abort is required to reset the hardware I2C state machine.
100+
(void)i2c->I2C_CLR_RX_DONE;
101+
(void)i2c->I2C_CLR_RD_REQ;
102+
i2c->I2C_INTR_MASK &= ~I2C_IC_INTR_STAT_RD_REQ;
103+
if (self->state != STATE_READING) {
104+
machine_i2c_target_data_addr_match(data, true);
105+
}
106+
machine_i2c_target_data_read_request(self, data);
107+
self->state = STATE_READING;
108+
}
109+
110+
if (intr_stat & I2C_IC_INTR_STAT_STOP_DET) {
111+
// Controller has generated a stop condition.
112+
(void)i2c->I2C_CLR_STOP_DET;
113+
if (self->state == STATE_IDLE) {
114+
machine_i2c_target_data_addr_match(data, false);
115+
}
116+
machine_i2c_target_data_restart_or_stop(data);
117+
self->state = STATE_IDLE;
118+
}
119+
}
120+
121+
void I2C0_IRQHandler(void) {
122+
i2c_target_irq_handler(&machine_i2c_target_obj[0]);
123+
}
124+
125+
void I2C1_IRQHandler(void) {
126+
i2c_target_irq_handler(&machine_i2c_target_obj[1]);
127+
}
128+
129+
void I2C2_IRQHandler(void) {
130+
i2c_target_irq_handler(&machine_i2c_target_obj[2]);
131+
}
132+
133+
void I2C3_IRQHandler(void) {
134+
i2c_target_irq_handler(&machine_i2c_target_obj[3]);
135+
}
136+
137+
/******************************************************************************/
138+
// I2CTarget port implementation
139+
140+
static void mp_machine_i2c_target_deinit_all_port(void) {
141+
}
142+
143+
static void mp_machine_i2c_target_event_callback(machine_i2c_target_irq_obj_t *irq) {
144+
mp_irq_handler(&irq->base);
145+
}
146+
147+
static size_t mp_machine_i2c_target_read_bytes(machine_i2c_target_obj_t *self, size_t len, uint8_t *buf) {
148+
I2C_Type *i2c = self->i2c;
149+
150+
// Read from the RX FIFO.
151+
size_t i = 0;
152+
while (i < len && (i2c->I2C_STATUS & I2C_IC_STATUS_RECEIVE_FIFO_NOT_EMPTY)) {
153+
buf[i++] = i2c->I2C_DATA_CMD;
154+
}
155+
156+
// Re-enable RX_FULL interrupt.
157+
i2c->I2C_INTR_MASK |= I2C_IC_INTR_STAT_RX_FULL;
158+
159+
return i;
160+
}
161+
162+
static size_t mp_machine_i2c_target_write_bytes(machine_i2c_target_obj_t *self, size_t len, const uint8_t *buf) {
163+
// Write to the TX FIFO.
164+
self->i2c->I2C_DATA_CMD = buf[0];
165+
166+
// Re-enable RD_REQ interrupt.
167+
self->i2c->I2C_INTR_MASK |= I2C_IC_INTR_STAT_RD_REQ;
168+
169+
return 1;
170+
}
171+
172+
static void mp_machine_i2c_target_irq_config(machine_i2c_target_obj_t *self, unsigned int trigger) {
173+
}
174+
175+
static mp_obj_t mp_machine_i2c_target_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) {
176+
enum { ARG_id, ARG_addr, ARG_addrsize, ARG_mem, ARG_mem_addrsize, ARG_scl, ARG_sda };
177+
static const mp_arg_t allowed_args[] = {
178+
{ MP_QSTR_id, MP_ARG_INT | MP_ARG_REQUIRED },
179+
{ MP_QSTR_addr, MP_ARG_REQUIRED | MP_ARG_INT },
180+
{ MP_QSTR_addrsize, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 7} },
181+
{ MP_QSTR_mem, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_rom_obj = MP_ROM_NONE} },
182+
{ MP_QSTR_mem_addrsize, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 8} },
183+
{ MP_QSTR_scl, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_rom_obj = MP_ROM_NONE} },
184+
{ MP_QSTR_sda, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_rom_obj = MP_ROM_NONE} },
185+
};
186+
187+
// Parse args.
188+
mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
189+
mp_arg_parse_all_kw_array(n_args, n_kw, all_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
190+
191+
int i2c_id = args[ARG_id].u_int;
192+
193+
// Check if the I2C bus is valid
194+
if (i2c_id < 0 || i2c_id >= MP_ARRAY_SIZE(machine_i2c_target_obj)) {
195+
mp_raise_msg_varg(&mp_type_ValueError, MP_ERROR_TEXT("I2CTarget(%d) doesn't exist"), i2c_id);
196+
}
197+
198+
// Get static peripheral object.
199+
machine_i2c_target_obj_t *self = &machine_i2c_target_obj[i2c_id];
200+
201+
// Disable I2C controller.
202+
i2c_disable(self->i2c);
203+
204+
self->state = STATE_IDLE;
205+
206+
// Initialise data.
207+
MP_STATE_PORT(i2c_target_mem_obj)[i2c_id] = args[ARG_mem].u_obj;
208+
machine_i2c_target_data_t *data = &i2c_target_data[i2c_id];
209+
machine_i2c_target_data_init(data, args[ARG_mem].u_obj, args[ARG_mem_addrsize].u_int);
210+
211+
// Set SCL/SDA pins if given.
212+
if (args[ARG_scl].u_obj != mp_const_none) {
213+
self->scl = mp_hal_get_pin_obj(args[ARG_scl].u_obj);
214+
}
215+
if (args[ARG_sda].u_obj != mp_const_none) {
216+
self->sda = mp_hal_get_pin_obj(args[ARG_sda].u_obj);
217+
}
218+
219+
// Configure I2C pins.
220+
mp_hal_pin_config(self->scl, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_UP,
221+
MP_HAL_PIN_SPEED_LOW, MP_HAL_PIN_DRIVE_8MA, MP_HAL_PIN_ALT(I2C_SCL, i2c_id), true);
222+
mp_hal_pin_config(self->sda, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_UP,
223+
MP_HAL_PIN_SPEED_LOW, MP_HAL_PIN_DRIVE_8MA, MP_HAL_PIN_ALT(I2C_SDA, i2c_id), true);
224+
225+
// Initialise the I2C target.
226+
227+
i2c_disable(self->i2c);
228+
229+
self->i2c->I2C_SAR = args[ARG_addr].u_int & I2C_IC_SAR_10BIT_ADDR_MASK;
230+
231+
uint32_t ic_con_reg = 0;
232+
if (args[ARG_addrsize].u_int == 10) {
233+
ic_con_reg |= I2C_SLAVE_10BIT_ADDR_MODE;
234+
}
235+
ic_con_reg |= I2C_IC_CON_TX_EMPTY_CTRL;
236+
ic_con_reg |= I2C_IC_CON_STOP_DET_IFADDRESSED;
237+
self->i2c->I2C_CON = ic_con_reg;
238+
self->i2c->I2C_TX_TL = 1; // what to use here?
239+
self->i2c->I2C_RX_TL = 0; // interrupt when at least 1 byte is available
240+
241+
self->i2c->I2C_INTR_MASK =
242+
// | I2C_IC_INTR_STAT_START_DET // 0x0400
243+
I2C_IC_INTR_STAT_STOP_DET // 0x0200
244+
// | I2C_IC_INTR_STAT_ACTIVITY // 0x0100
245+
| I2C_IC_INTR_STAT_RX_DONE // 0x0080
246+
| I2C_IC_INTR_STAT_TX_ABRT // 0x0040
247+
| I2C_IC_INTR_STAT_RD_REQ // 0x0020
248+
// | I2C_IC_INTR_STAT_TX_EMPTY // 0x0010
249+
// | I2C_IC_INTR_STAT_TX_OVER // 0x0008
250+
| I2C_IC_INTR_STAT_RX_FULL // 0x0004
251+
// | I2C_IC_INTR_STAT_RX_OVER // 0x0002
252+
// | I2C_IC_INTR_STAT_RX_UNDER // 0x0001
253+
;
254+
255+
i2c_enable(self->i2c);
256+
257+
// Enable I2C interrupts.
258+
i2c_clear_all_interrupt(self->i2c);
259+
NVIC_ClearPendingIRQ(self->irq_num);
260+
NVIC_SetPriority(self->irq_num, IRQ_PRI_I2C);
261+
NVIC_EnableIRQ(self->irq_num);
262+
263+
return MP_OBJ_FROM_PTR(self);
264+
}
265+
266+
static void mp_machine_i2c_target_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
267+
machine_i2c_target_obj_t *self = MP_OBJ_TO_PTR(self_in);
268+
mp_printf(print, "I2CTarget(%u, addr=%u, scl=" MP_HAL_PIN_FMT ", sda=" MP_HAL_PIN_FMT ")",
269+
self - &machine_i2c_target_obj[0], self->i2c->I2C_SAR, mp_hal_pin_name(self->scl), mp_hal_pin_name(self->sda));
270+
}
271+
272+
static void mp_machine_i2c_target_deinit(machine_i2c_target_obj_t *self) {
273+
NVIC_DisableIRQ(self->irq_num);
274+
i2c_disable(self->i2c);
275+
}

‎ports/alif/main.c‎

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -31,6 +31,7 @@
3131
#include "py/mphal.h"
3232
#include "py/stackctrl.h"
3333
#include "extmod/modbluetooth.h"
34+
#include "extmod/modmachine.h"
3435
#include "extmod/modnetwork.h"
3536
#include "shared/readline/readline.h"
3637
#include "shared/runtime/gchelper.h"
@@ -164,6 +165,9 @@ int main(void) {
164165
#if MICROPY_PY_BLUETOOTH
165166
mp_bluetooth_deinit();
166167
#endif
168+
#if MICROPY_PY_MACHINE_I2C_TARGET
169+
mp_machine_i2c_target_deinit_all();
170+
#endif
167171
soft_timer_deinit();
168172
machine_pin_irq_deinit();
169173
gc_sweep_all();

‎ports/alif/mpconfigport.h‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -132,6 +132,8 @@
132132
#define MICROPY_PY_MACHINE_PULSE (1)
133133
#define MICROPY_PY_MACHINE_I2C (MICROPY_HW_ENABLE_HW_I2C)
134134
#define MICROPY_PY_MACHINE_I2C_TRANSFER_WRITE1 (1)
135+
#define MICROPY_PY_MACHINE_I2C_TARGET (MICROPY_HW_ENABLE_HW_I2C)
136+
#define MICROPY_PY_MACHINE_I2C_TARGET_INCLUDEFILE "ports/alif/machine_i2c_target.c"
135137
#define MICROPY_PY_MACHINE_SOFTI2C (1)
136138
#define MICROPY_PY_MACHINE_SPI (1)
137139
#define MICROPY_PY_MACHINE_SOFTSPI (1)

0 commit comments

Comments
 (0)