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lovrojakiclovrojakic
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Board init and pins from hardkernel_odroid_go
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3 files changed

+133
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‎ports/espressif/boards/vidi_x/board.c‎

Lines changed: 99 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -3,7 +3,7 @@
33
*
44
* The MIT License (MIT)
55
*
6-
* Copyright (c) 2023 Radio Sound, Inc.
6+
* Copyright (c) 2020 Scott Shawcroft for Adafruit Industries
77
*
88
* Permission is hereby granted, free of charge, to any person obtaining a copy
99
* of this software and associated documentation files (the "Software"), to deal
@@ -26,9 +26,104 @@
2626

2727
#include "supervisor/board.h"
2828
#include "mpconfigboard.h"
29-
#include "shared-bindings/microcontroller/Pin.h"
30-
#include "components/driver/gpio/include/driver/gpio.h"
31-
#include "components/hal/include/hal/gpio_hal.h"
29+
#include "shared-bindings/busio/SPI.h"
30+
#include "shared-bindings/fourwire/FourWire.h"
31+
#include "shared-module/displayio/__init__.h"
32+
#include "shared-module/displayio/mipi_constants.h"
33+
3234
#include "common-hal/microcontroller/Pin.h"
3335

36+
#define DELAY 0x80
37+
38+
// ILI9341 init sequence from:
39+
// https://github.com/hardkernel/ODROID-GO-MicroPython/blob/loboris/odroid_go/utils/lcd/lcd.py#L55
40+
uint8_t display_init_sequence[] = {
41+
0x0f, 3, 0x03, 0x80, 0x02, // RDDSDR
42+
0xcf, 3, 0x00, 0xcf, 0x30, // PWCRTLB
43+
0xed, 4, 0x64, 0x03, 0x12, 0x81, // PWRONCTRL
44+
0xe8, 3, 0x85, 0x00, 0x78, // DTCTRLA
45+
0xcb, 5, 0x39, 0x2c, 0x00, 0x34, 0x02, // PWCTRLA
46+
0xf7, 1, 0x20, // PRCTRL
47+
0xea, 2, 0x00, 0x00, // DTCTRLB
48+
0xc0, 1, 0x1b, // PWCTRL1
49+
0xc1, 1, 0x12, // PWCTRL2
50+
0xc5, 2, 0x3e, 0x3c, // VMCTRL1
51+
0xc7, 1, 0x91, // VMCTRL2
52+
0x36, 1, 0xa8, // MADCTL
53+
0x3a, 1, 0x55, // PIXSET
54+
0xb1, 2, 0x00, 0x1b, // FRMCTR1
55+
0xb6, 3, 0x0a, 0xa2, 0x27, // DISCTRL
56+
0xf6, 2, 0x01, 0x30, // INTFACE
57+
0xf2, 1, 0x00, // ENA3G
58+
0x26, 1, 0x01, // GAMSET
59+
0xe0, 15, 0x0f, 0x31, 0x2b, 0x0c, 0x0e, 0x08, 0x4e, 0xf1, 0x37, 0x07, 0x10, 0x03, 0x0e, 0x09, 0x00, // PGAMCTRL
60+
0xe1, 15, 0x00, 0x0e, 0x14, 0x03, 0x11, 0x07, 0x31, 0xc1, 0x48, 0x08, 0x0f, 0x0c, 0x31, 0x36, 0x0f, // NGAMCTRL
61+
0x11, 0 | DELAY, 10, // SLPOUT
62+
0x29, 0 | DELAY, 100, // DISPON
63+
};
64+
65+
void board_init(void) {
66+
fourwire_fourwire_obj_t *bus = &allocate_display_bus()->fourwire_bus;
67+
busio_spi_obj_t *spi = &bus->inline_bus;
68+
common_hal_busio_spi_construct(spi, &pin_GPIO18, &pin_GPIO23, NULL, false);
69+
common_hal_busio_spi_never_reset(spi);
70+
71+
bus->base.type = &fourwire_fourwire_type;
72+
common_hal_fourwire_fourwire_construct(bus,
73+
spi,
74+
&pin_GPIO21, // TFT_DC Command or data
75+
&pin_GPIO5, // TFT_CS Chip select
76+
NULL, // TFT_RST Reset
77+
40000000, // Baudrate
78+
0, // Polarity
79+
0); // Phase
80+
81+
busdisplay_busdisplay_obj_t *display = &allocate_display()->display;
82+
display->base.type = &busdisplay_busdisplay_type;
83+
common_hal_busdisplay_busdisplay_construct(display,
84+
bus,
85+
320, // Width (after rotation)
86+
240, // Height (after rotation)
87+
0, // column start
88+
0, // row start
89+
0, // rotation
90+
16, // Color depth
91+
false, // grayscale
92+
false, // pixels in byte share row. only used for depth < 8
93+
1, // bytes per cell. Only valid for depths < 8
94+
false, // reverse_pixels_in_byte. Only valid for depths < 8
95+
true, // reverse_pixels_in_word
96+
MIPI_COMMAND_SET_COLUMN_ADDRESS, // Set column command
97+
MIPI_COMMAND_SET_PAGE_ADDRESS, // Set row command
98+
MIPI_COMMAND_WRITE_MEMORY_START, // Write memory command
99+
display_init_sequence,
100+
sizeof(display_init_sequence),
101+
&pin_GPIO14, // backlight pin
102+
NO_BRIGHTNESS_COMMAND,
103+
1.0f, // brightness
104+
false, // single_byte_bounds
105+
false, // data_as_commands
106+
true, // auto_refresh
107+
60, // native_frames_per_second
108+
true, // backlight_on_high
109+
false, // SH1107_addressing
110+
50000); // backlight pwm frequency
111+
}
112+
113+
bool espressif_board_reset_pin_number(gpio_num_t pin_number) {
114+
// Pull LED down on reset rather than the default up
115+
if (pin_number == 2) {
116+
gpio_config_t cfg = {
117+
.pin_bit_mask = BIT64(pin_number),
118+
.mode = GPIO_MODE_DISABLE,
119+
.pull_up_en = false,
120+
.pull_down_en = true,
121+
.intr_type = GPIO_INTR_DISABLE,
122+
};
123+
gpio_config(&cfg);
124+
return true;
125+
}
126+
return false;
127+
}
128+
34129
// Use the MP_WEAK supervisor/shared/board.c versions of routines not defined here.

‎ports/espressif/boards/vidi_x/mpconfigboard.h‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -35,15 +35,15 @@
3535
#define CIRCUITPY_BOARD_I2C_PIN {{.scl = &pin_GPIO15, .sda = &pin_GPIO4}}
3636

3737
#define CIRCUITPY_BOARD_SPI (1)
38-
#define CIRCUITPY_BOARD_SPI_PIN {{.clock = &pin_GPIO19, .mosi = &pin_GPIO5, .miso = &pin_GPIO18}}
38+
#define CIRCUITPY_BOARD_SPI_PIN {{.clock = &pin_GPIO18, .mosi = &pin_GPIO23, .miso = &pin_GPIO19}}
3939

4040
#define CIRCUITPY_BOARD_UART (0)
4141

42-
// For entering safe mode, use BUT button
42+
// For entering safe mode, use VOL button
4343
#define CIRCUITPY_BOOT_BUTTON (&pin_GPIO0)
4444

4545
// Explanation of how a user got into safe mode
46-
// #define BOARD_USER_SAFE_MODE_ACTION MP_ERROR_TEXT("You pressed the BUT button at start up.")
46+
#define BOARD_USER_SAFE_MODE_ACTION MP_ERROR_TEXT("You pressed the VOL button at start up.")
4747

4848
// UART pins attached to the USB-serial converter chip
4949
#define CIRCUITPY_CONSOLE_UART_TX (&pin_GPIO1)

‎ports/espressif/boards/vidi_x/pins.c‎

Lines changed: 31 additions & 68 deletions
Original file line numberDiff line numberDiff line change
@@ -1,97 +1,60 @@
1+
#include "py/objtuple.h"
12
#include "shared-bindings/board/__init__.h"
3+
#include "shared-module/displayio/__init__.h"
4+
5+
// Pin names from: https://wiki.odroid.com/odroid_go/odroid_go
26

37
STATIC const mp_rom_map_elem_t board_module_globals_table[] = {
48
CIRCUITPYTHON_BOARD_DICT_STANDARD_ITEMS
59

6-
// External pins are in silkscreen order, from top to bottom, right side, then left side
7-
{ MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_GPIO23) },
8-
{ MP_ROM_QSTR(MP_QSTR_PWM0), MP_ROM_PTR(&pin_GPIO23) },
9-
{ MP_ROM_QSTR(MP_QSTR_CAMD4), MP_ROM_PTR(&pin_GPIO23) },
10-
11-
{ MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_GPIO22) },
12-
{ MP_ROM_QSTR(MP_QSTR_PWM1), MP_ROM_PTR(&pin_GPIO22) },
13-
{ MP_ROM_QSTR(MP_QSTR_CAMD3), MP_ROM_PTR(&pin_GPIO22) },
14-
15-
{ MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO1) },
16-
{ MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_GPIO1) },
17-
18-
{ MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO3) },
19-
{ MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_GPIO3) },
10+
// Left side
11+
{ MP_ROM_QSTR(MP_QSTR_BATTERY), MP_ROM_PTR(&pin_GPIO36) },
2012

21-
{ MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_GPIO21) },
22-
{ MP_ROM_QSTR(MP_QSTR_SS), MP_ROM_PTR(&pin_GPIO21) },
23-
{ MP_ROM_QSTR(MP_QSTR_CAMD5), MP_ROM_PTR(&pin_GPIO21) },
13+
{ MP_ROM_QSTR(MP_QSTR_BTN_START), MP_ROM_PTR(&pin_GPIO39) },
2414

25-
{ MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_GPIO19) },
26-
{ MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_GPIO19) },
27-
{ MP_ROM_QSTR(MP_QSTR_CAMD2), MP_ROM_PTR(&pin_GPIO19) },
15+
{ MP_ROM_QSTR(MP_QSTR_BTN_AXIS_X), MP_ROM_PTR(&pin_GPIO34) },
2816

29-
{ MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_GPIO18) },
30-
{ MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_GPIO18) },
31-
{ MP_ROM_QSTR(MP_QSTR_CAMD6), MP_ROM_PTR(&pin_GPIO18) },
17+
{ MP_ROM_QSTR(MP_QSTR_BTN_AXIS_Y), MP_ROM_PTR(&pin_GPIO35) },
3218

33-
{ MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_GPIO5) },
34-
{ MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_GPIO5) },
35-
{ MP_ROM_QSTR(MP_QSTR_CAMPC), MP_ROM_PTR(&pin_GPIO5) },
19+
{ MP_ROM_QSTR(MP_QSTR_BTN_A), MP_ROM_PTR(&pin_GPIO32) },
3620

37-
{ MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_GPIO0) },
38-
{ MP_ROM_QSTR(MP_QSTR_BOOT), MP_ROM_PTR(&pin_GPIO0) },
39-
{ MP_ROM_QSTR(MP_QSTR_GPKEY), MP_ROM_PTR(&pin_GPIO0) },
21+
{ MP_ROM_QSTR(MP_QSTR_BTN_B), MP_ROM_PTR(&pin_GPIO33) },
4022

41-
{ MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_GPIO2) },
42-
{ MP_ROM_QSTR(MP_QSTR_SDMI), MP_ROM_PTR(&pin_GPIO2) },
23+
{ MP_ROM_QSTR(MP_QSTR_SPEAKER_IN_M), MP_ROM_PTR(&pin_GPIO25) },
4324

44-
{ MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_GPIO4) },
45-
{ MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_GPIO4) },
25+
{ MP_ROM_QSTR(MP_QSTR_SPEAKER_IN_P), MP_ROM_PTR(&pin_GPIO26) },
4626

47-
{ MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_GPIO15) },
48-
{ MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_GPIO15) },
27+
{ MP_ROM_QSTR(MP_QSTR_BTN_SELECT), MP_ROM_PTR(&pin_GPIO27) },
4928

50-
{ MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_GPIO13) },
51-
{ MP_ROM_QSTR(MP_QSTR_T5), MP_ROM_PTR(&pin_GPIO13) },
52-
{ MP_ROM_QSTR(MP_QSTR_RGBLED), MP_ROM_PTR(&pin_GPIO13) },
29+
{ MP_ROM_QSTR(MP_QSTR_BACKLIGHT_PWM), MP_ROM_PTR(&pin_GPIO14) },
5330

54-
{ MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_GPIO12) },
55-
{ MP_ROM_QSTR(MP_QSTR_T4), MP_ROM_PTR(&pin_GPIO12) },
56-
{ MP_ROM_QSTR(MP_QSTR_SDCS), MP_ROM_PTR(&pin_GPIO12) },
31+
{ MP_ROM_QSTR(MP_QSTR_EXT3), MP_ROM_PTR(&pin_GPIO12) },
5732

58-
{ MP_ROM_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_GPIO14) },
59-
{ MP_ROM_QSTR(MP_QSTR_T3), MP_ROM_PTR(&pin_GPIO14) },
60-
{ MP_ROM_QSTR(MP_QSTR_SDMO), MP_ROM_PTR(&pin_GPIO14) },
33+
{ MP_ROM_QSTR(MP_QSTR_BTN_MENU), MP_ROM_PTR(&pin_GPIO13) },
6134

62-
{ MP_ROM_QSTR(MP_QSTR_D15), MP_ROM_PTR(&pin_GPIO27) },
63-
{ MP_ROM_QSTR(MP_QSTR_T2), MP_ROM_PTR(&pin_GPIO27) },
64-
{ MP_ROM_QSTR(MP_QSTR_SDCK), MP_ROM_PTR(&pin_GPIO27) },
35+
// Right side.
36+
{ MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_GPIO23) },
37+
{ MP_ROM_QSTR(MP_QSTR_EXT8), MP_ROM_PTR(&pin_GPIO23) },
6538

66-
{ MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_GPIO36) },
67-
{ MP_ROM_QSTR(MP_QSTR_CAMV), MP_ROM_PTR(&pin_GPIO36) },
39+
{ MP_ROM_QSTR(MP_QSTR_SD_CS), MP_ROM_PTR(&pin_GPIO22) },
6840

69-
{ MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_GPIO39) },
70-
{ MP_ROM_QSTR(MP_QSTR_CAMH), MP_ROM_PTR(&pin_GPIO39) },
41+
{ MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_GPIO19) },
42+
{ MP_ROM_QSTR(MP_QSTR_EXT7), MP_ROM_PTR(&pin_GPIO19) },
7143

72-
{ MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_GPIO34) },
73-
{ MP_ROM_QSTR(MP_QSTR_CAMD9), MP_ROM_PTR(&pin_GPIO34) },
44+
{ MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_GPIO18) },
45+
{ MP_ROM_QSTR(MP_QSTR_EXT2), MP_ROM_PTR(&pin_GPIO18) },
7446

75-
{ MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_GPIO35) },
76-
{ MP_ROM_QSTR(MP_QSTR_CAMD8), MP_ROM_PTR(&pin_GPIO35) },
47+
{ MP_ROM_QSTR(MP_QSTR_LCD_CS), MP_ROM_PTR(&pin_GPIO5) },
7748

78-
{ MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_GPIO32) },
79-
{ MP_ROM_QSTR(MP_QSTR_T0), MP_ROM_PTR(&pin_GPIO32) },
80-
{ MP_ROM_QSTR(MP_QSTR_CAMXC), MP_ROM_PTR(&pin_GPIO32) },
49+
{ MP_ROM_QSTR(MP_QSTR_EXT5), MP_ROM_PTR(&pin_GPIO4) },
8150

82-
{ MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_GPIO33) },
83-
{ MP_ROM_QSTR(MP_QSTR_T1), MP_ROM_PTR(&pin_GPIO33) },
84-
{ MP_ROM_QSTR(MP_QSTR_CAMSD), MP_ROM_PTR(&pin_GPIO33) },
51+
{ MP_ROM_QSTR(MP_QSTR_BTN_VOLUME), MP_ROM_PTR(&pin_GPIO0) },
8552

86-
{ MP_ROM_QSTR(MP_QSTR_DAC1), MP_ROM_PTR(&pin_GPIO25) },
87-
{ MP_ROM_QSTR(MP_QSTR_CAMSC), MP_ROM_PTR(&pin_GPIO25) },
53+
{ MP_ROM_QSTR(MP_QSTR_LED), MP_ROM_PTR(&pin_GPIO2) },
8854

89-
{ MP_ROM_QSTR(MP_QSTR_DAC2), MP_ROM_PTR(&pin_GPIO26) },
90-
{ MP_ROM_QSTR(MP_QSTR_CAMD7), MP_ROM_PTR(&pin_GPIO26) },
55+
{ MP_ROM_QSTR(MP_QSTR_EXT4), MP_ROM_PTR(&pin_GPIO15) },
9156

92-
{ MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) },
93-
{ MP_ROM_QSTR(MP_QSTR_STEMMA_I2C), MP_ROM_PTR(&board_i2c_obj) },
9457
{ MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) },
95-
{ MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }
58+
{ MP_ROM_QSTR(MP_QSTR_DISPLAY), MP_ROM_PTR(&displays[0].display)},
9659
};
9760
MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table);

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