rp2/machine_i2c_target: Fix sequencing.

Signed-off-by: Damien George <[email protected]>

Author: dpgeorge

ports/rp2/machine_i2c_target.c

@@ -77,6 +77,7 @@ typedef struct _machine_i2c_target_obj_t {
     mp_hal_pin_obj_t sda;
     uint8_t state;
     bool stop_pending;
+    bool irq_active;
 } machine_i2c_target_obj_t;
 
 static machine_i2c_target_data_t i2c_target_data[4];
@@ -89,11 +90,26 @@ static machine_i2c_target_obj_t machine_i2c_target_obj[] = {
 /******************************************************************************/
 // RP2xxx hardware bindings
 
+static void check_stop_pending(machine_i2c_target_obj_t *self) {
+    if (self->irq_active) {
+        return;
+    }
+    if (self->stop_pending && !(self->i2c_inst->hw->status & I2C_IC_STATUS_RFNE_BITS)) {
+        unsigned int i2c_id = self - &machine_i2c_target_obj[0];
+        machine_i2c_target_data_t *data = &i2c_target_data[i2c_id];
+        self->stop_pending = false;
+        self->state = STATE_IDLE;
+        machine_i2c_target_data_restart_or_stop(data);
+    }
+}
+
 static void i2c_target_handler(i2c_inst_t *i2c) {
     unsigned int i2c_id = i2c == i2c0 ? 0 : 1;
     machine_i2c_target_obj_t *self = &machine_i2c_target_obj[i2c_id];
     machine_i2c_target_data_t *data = &i2c_target_data[i2c_id];
 
+    self->irq_active = true;
+
     // Get the interrupt status.
     uint32_t intr_stat = i2c->hw->intr_stat;
 
@@ -102,6 +118,16 @@ static void i2c_target_handler(i2c_inst_t *i2c) {
         (void)i2c->hw->clr_tx_abrt;
     }
 
+    if (intr_stat & I2C_IC_INTR_STAT_R_START_DET_BITS) {
+        // Controller sent a start condition.
+        // Reset all state machines in case something went wrong.
+        (void)i2c->hw->clr_start_det;
+        if (self->state != STATE_IDLE) {
+            machine_i2c_target_data_reset_helper(data);
+            self->state = STATE_IDLE;
+        }
+    }
+
     if (intr_stat & I2C_IC_INTR_STAT_R_RX_FULL_BITS) {
         // Data from controller is available for reading.
         // Mask interrupt until I2C_DATA_CMD is read from.
@@ -138,6 +164,9 @@ static void i2c_target_handler(i2c_inst_t *i2c) {
             self->state = STATE_IDLE;
         }
     }
+
+    self->irq_active = false;
+    check_stop_pending(self);
 }
 
 static void i2c_slave_irq_handler(void) {
@@ -160,10 +189,12 @@ static void i2c_slave_init(i2c_inst_t *i2c, uint16_t addr, bool addr_10bit) {
     i2c->hw->sar = addr;
     i2c->hw->tx_tl = 1;
     i2c->hw->rx_tl = 0; // interrupt when at least 1 byte is available
+    (void)i2c->hw->clr_intr;
 
     // Enable interrupts.
     i2c->hw->intr_mask =
-        I2C_IC_INTR_MASK_M_STOP_DET_BITS
+        I2C_IC_INTR_MASK_M_START_DET_BITS
+        | I2C_IC_INTR_MASK_M_STOP_DET_BITS
         | I2C_IC_INTR_MASK_M_RX_DONE_BITS
         | I2C_IC_INTR_MASK_M_TX_ABRT_BITS
         | I2C_IC_INTR_MASK_M_RD_REQ_BITS
@@ -187,6 +218,7 @@ static void i2c_slave_deinit(i2c_inst_t *i2c) {
 
     i2c->hw->intr_mask = 0;
     i2c->hw->enable = 0;
+    i2c->hw->con = I2C_IC_CON_IC_SLAVE_DISABLE_BITS;
 }
 
 /******************************************************************************/
@@ -199,39 +231,36 @@ static void mp_machine_i2c_target_event_callback(machine_i2c_target_irq_obj_t *i
     mp_irq_handler(&irq->base);
 }
 
-static mp_int_t mp_machine_i2c_target_read_bytes(machine_i2c_target_obj_t *self, size_t len, uint8_t *buf) {
+static size_t mp_machine_i2c_target_read_bytes(machine_i2c_target_obj_t *self, size_t len, uint8_t *buf) {
     i2c_hw_t *i2c_hw = self->i2c_inst->hw;
 
     // Read from the RX FIFO.
-    mp_int_t i = 0;
+    size_t i = 0;
     while (i < len && (i2c_hw->status & I2C_IC_STATUS_RFNE_BITS)) {
         buf[i++] = i2c_hw->data_cmd;
     }
 
     // Re-enable RX_FULL interrupt.
     i2c_hw->intr_mask |= I2C_IC_INTR_MASK_M_RX_FULL_BITS;
 
-    if (self->stop_pending && !(i2c_hw->status & I2C_IC_STATUS_RFNE_BITS)) {
-        unsigned int i2c_id = self->i2c_inst == i2c0 ? 0 : 1;
-        machine_i2c_target_data_t *data = &i2c_target_data[i2c_id];
-        self->stop_pending = false;
-        self->state = STATE_IDLE;
-        machine_i2c_target_data_restart_or_stop(data);
-    }
+    check_stop_pending(self);
 
     return i;
 }
 
-static mp_int_t mp_machine_i2c_target_write_bytes(machine_i2c_target_obj_t *self, size_t len, const uint8_t *buf) {
+static size_t mp_machine_i2c_target_write_bytes(machine_i2c_target_obj_t *self, size_t len, const uint8_t *buf) {
     i2c_hw_t *i2c_hw = self->i2c_inst->hw;
 
     // Write to the TX FIFO.
-    i2c_hw->data_cmd = buf[0];
+    size_t i = 0;
+    while (i < len && (i2c_hw->status & I2C_IC_STATUS_TFNF_BITS)) {
+        i2c_hw->data_cmd = buf[i++];
+    }
 
     // Re-enable RD_REQ interrupt.
     i2c_hw->intr_mask |= I2C_IC_INTR_MASK_M_RD_REQ_BITS;
 
-    return 1;
+    return i;
 }
 
 static void mp_machine_i2c_target_irq_config(machine_i2c_target_obj_t *self, unsigned int trigger) {
@@ -271,6 +300,7 @@ static mp_obj_t mp_machine_i2c_target_make_new(const mp_obj_type_t *type, size_t
     // Initialise data.
     self->state = STATE_IDLE;
     self->stop_pending = false;
+    self->irq_active = false;
     MP_STATE_PORT(i2c_target_mem_obj)[i2c_id] = args[ARG_mem].u_obj;
     machine_i2c_target_data_t *data = &i2c_target_data[i2c_id];
     machine_i2c_target_data_init(data, args[ARG_mem].u_obj, args[ARG_mem_addrsize].u_int);
@@ -310,5 +340,7 @@ static void mp_machine_i2c_target_print(const mp_print_t *print, mp_obj_t self_i
 }
 
 static void mp_machine_i2c_target_deinit(machine_i2c_target_obj_t *self) {
+    gpio_set_function(self->scl, GPIO_FUNC_SIO);
+    gpio_set_function(self->sda, GPIO_FUNC_SIO);
     i2c_slave_deinit(self->i2c_inst);
 }