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Add AVR unit tests.
Signed-off-by: Glenn Baker <[email protected]>
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‎CMakeLists.txt

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@@ -1359,6 +1359,7 @@ if (UNICORN_HAS_AVR)
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set(UNICORN_LINK_LIBRARIES ${UNICORN_LINK_LIBRARIES} avr-softmmu)
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set(UNICORN_SAMPLE_FILE ${UNICORN_SAMPLE_FILE} sample_avr)
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target_link_libraries(avr-softmmu unicorn-common)
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set(UNICORN_TEST_FILE ${UNICORN_TEST_FILE} test_avr)
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endif()
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# Extra tests

‎tests/unit/test_avr.c

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#include <assert.h>
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#include "unicorn_test.h"
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#define ARRAY_ELEMS(a) (sizeof(a) / sizeof((a)[0]))
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#define PAGE_SIZE 256
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#define PAGE_ALIGN(x) (((x) + PAGE_SIZE - 1) & -PAGE_SIZE)
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enum {
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ADDR__init__,
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ADDR_test_func,
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ADDR_test_1,
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ADDR_main,
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ADDR_abort,
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ADDR_exit,
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ADDR__stop_program,
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ADDR__data__,
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};
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static const uint16_t ADDR[] = {
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0x0000, // __init__
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0x001a, // test_func()
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0x0030, // test_1()
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0x0058, // main()
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0x0062, // abort()
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0x006c, // _exit()
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0x006e, // __stop_program()
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0x0070, // __data__
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0x0072, // __size__
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};
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static const uint8_t FLASH[] =
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// 00000000 <__ctors_end>:
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"\x12\xe0" // ldi r17, 0x02
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"\xa0\xe0" // ldi r26, 0x00
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"\xb2\xe0" // ldi r27, 0x02
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"\xe0\xe7" // ldi r30, 0x70
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"\xf0\xe0" // ldi r31, 0x00
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"\x00\xe0" // ldi r16, 0x00
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"\x0b\xbf" // out 0x3b, r16
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"\x02\xc0" // rjmp .+4
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"\x07\x90" // elpm r0, Z+
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"\x0d\x92" // st X+, r0
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"\xa2\x30" // cpi r26, 0x02
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"\xb1\x07" // cpc r27, r17
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"\xd9\xf7" // brne .-10
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// 0000001a <test_func>:
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"\x20\x91\x00\x02" // lds r18, 0x0200
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"\x30\x91\x01\x02" // lds r19, 0x0201
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"\x86\x0f" // add r24, r22
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"\x97\x1f" // adc r25, r23
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"\x88\x0f" // add r24, r24
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"\x99\x1f" // adc r25, r25
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"\x82\x0f" // add r24, r18
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"\x93\x1f" // adc r25, r19
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"\x08\x95" // ret
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// 00000030 <test_1>:
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"\x62\xe0" // ldi r22, 0x02
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"\x70\xe0" // ldi r23, 0x00
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"\x81\xe0" // ldi r24, 0x01
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"\x90\xe0" // ldi r25, 0x00
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"\x0e\x94\x0d\x00" // call 0x1a
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"\x07\x97" // sbiw r24, 0x07
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"\x11\xf0" // breq .+4
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"\x0e\x94\x31\x00" // call 0x62
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"\x60\xe8" // ldi r22, 0x80
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"\x70\xe0" // ldi r23, 0x00
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"\x80\xe4" // ldi r24, 0x40
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"\x90\xe0" // ldi r25, 0x00
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"\x0e\x94\x0d\x00" // call 0x1a
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"\x81\x38" // cpi r24, 0x81
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"\x91\x40" // sbci r25, 0x01
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"\xa9\xf7" // brne .-22
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"\x08\x95" // ret
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// 00000058 <main>:
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"\x0e\x94\x18\x00" // call 0x30
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"\x80\xe0" // ldi r24, 0x00
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"\x90\xe0" // ldi r25, 0x00
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"\x08\x95" // ret
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// 00000062 <abort>:
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"\x81\xe0" // ldi r24, 0x01
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"\x90\xe0" // ldi r25, 0x00
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"\xf8\x94" // cli
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"\x0c\x94\x36\x00" // jmp 0x6c
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// 0000006c <_exit>:
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"\xf8\x94" // cli
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// 0000006e <__stop_program>:
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"\xff\xcf" // rjmp .-2
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// 0x000070 .data
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"\x01\x00"
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;
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const uint64_t FLASH_SIZE = sizeof(FLASH);
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const uint64_t MEM_BASE = 0x0200;
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const uint64_t MEM_SIZE = 0x0100;
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static void uc_common_setup(uc_engine **uc, uc_cpu_avr cpu_model,
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const uint8_t *code, uint64_t code_size)
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{
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OK(uc_open(UC_ARCH_AVR, UC_MODE_LITTLE_ENDIAN, uc));
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if (cpu_model != 0)
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OK(uc_ctl_set_cpu_model(*uc, cpu_model));
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OK(uc_mem_map(*uc, UC_AVR_MEM_FLASH, PAGE_ALIGN(code_size),
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UC_PROT_READ|UC_PROT_EXEC));
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OK(uc_mem_write(*uc, UC_AVR_MEM_FLASH, code, code_size));
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OK(uc_mem_map(*uc, MEM_BASE, MEM_SIZE, UC_PROT_READ|UC_PROT_WRITE));
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}
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static void test_avr_basic_alu(void)
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{
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uc_engine *uc = NULL;
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uint8_t r[32] = {0,};
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uint16_t r_func_arg0 = 1, r_func_arg1 = 2, r_func_ret;
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r[24] = 1;
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r[22] = 2;
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uc_common_setup(&uc, 0, FLASH, FLASH_SIZE);
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OK(uc_reg_write(uc, UC_AVR_REG_R24W, &r_func_arg0));
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OK(uc_reg_write(uc, UC_AVR_REG_R22W, &r_func_arg1));
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const uint64_t code_start = ADDR[ADDR_test_func] + 8;
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OK(uc_emu_start(uc, code_start, code_start + 4, 0, 0));
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uint32_t r_pc;
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OK(uc_reg_read(uc, UC_AVR_REG_PC, &r_pc));
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OK(uc_reg_read(uc, UC_AVR_REG_R25, &r[25]));
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OK(uc_reg_read(uc, UC_AVR_REG_R24, &r[24]));
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OK(uc_reg_read(uc, UC_AVR_REG_R23, &r[23]));
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OK(uc_reg_read(uc, UC_AVR_REG_R22, &r[22]));
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TEST_CHECK(r_pc == code_start + 4);
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TEST_CHECK(r[25] == 0 && r[24] == 3);
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TEST_CHECK(r[23] == 0 && r[22] == 2);
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OK(uc_reg_read(uc, UC_AVR_REG_R24W, &r_func_ret));
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OK(uc_reg_read(uc, UC_AVR_REG_R22W, &r_func_arg1));
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TEST_CHECK(r_func_ret == r[24]);
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TEST_CHECK(r_func_arg1 == r[22]);
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OK(uc_close(uc));
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}
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typedef struct MEM_HOOK_RESULT_s {
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uc_mem_type type;
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uint64_t address;
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int size;
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uint64_t value;
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} MEM_HOOK_RESULT;
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typedef struct MEM_HOOK_RESULTS_s {
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uint64_t count;
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MEM_HOOK_RESULT results[16];
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} MEM_HOOK_RESULTS;
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static bool test_avr_basic_mem_cb_eventmem(uc_engine *uc, uc_mem_type type,
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uint64_t address, int size, int64_t value, void *user_data)
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{
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MEM_HOOK_RESULTS *const r = user_data;
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uint64_t count = r->count;
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if (count >= ARRAY_ELEMS(r->results)) {
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TEST_ASSERT(false);
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}
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r->results[count].type = type;
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r->results[count].address = address;
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r->results[count].size = size;
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r->results[count].value = value;
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r->count++;
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return true;
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}
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static void test_avr_basic_mem(void)
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{
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uc_engine *uc = NULL;
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uc_hook eventmem_hook;
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MEM_HOOK_RESULTS eventmem_trace = {0};
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uc_common_setup(&uc, 0, FLASH, FLASH_SIZE);
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OK(uc_hook_add(uc, &eventmem_hook, UC_HOOK_MEM_VALID,
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test_avr_basic_mem_cb_eventmem, &eventmem_trace, 1, 0));
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const uint64_t code_start = ADDR[ADDR__init__];
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OK(uc_emu_start(uc, code_start, ADDR[ADDR__init__+1], 0, 0));
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uint32_t r_pc;
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OK(uc_reg_read(uc, UC_AVR_REG_PC, &r_pc));
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TEST_CHECK(r_pc == ADDR[ADDR__init__+1]);
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const uint16_t DATA_BASE = ADDR[ADDR__data__];
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const uint16_t DATA_SIZE = ADDR[ADDR__data__+1] - DATA_BASE;
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const uint8_t *const DATA = &FLASH[ADDR[ADDR__data__]];
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// Check SRAM was correctly initialized with data from Flash program memory
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uint8_t mem[DATA_SIZE];
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OK(uc_mem_read(uc, MEM_BASE, mem, sizeof(mem)));
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TEST_CHECK(memcmp(mem, DATA, DATA_SIZE) == 0);
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TEST_CHECK(eventmem_trace.count == 2*DATA_SIZE);
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for (unsigned i = 0; i < DATA_SIZE; i++) {
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const MEM_HOOK_RESULT *const mr = &eventmem_trace.results[2*i];
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TEST_CHECK(mr->type == UC_MEM_READ);
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TEST_CHECK(mr->address == (UC_AVR_MEM_FLASH|(DATA_BASE+i)));
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TEST_CHECK(mr->size == 1);
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TEST_CHECK(mr->value == 0);
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const MEM_HOOK_RESULT *const mw = &eventmem_trace.results[2*i+1];
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TEST_CHECK(mw->type == UC_MEM_WRITE);
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TEST_CHECK(mw->address == MEM_BASE+i);
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TEST_CHECK(mw->size == 1);
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TEST_CHECK(mw->value == DATA[i]);
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}
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OK(uc_close(uc));
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}
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static void test_avr_full_exec(void)
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{
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uc_engine *uc = NULL;
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uc_common_setup(&uc, 0, FLASH, FLASH_SIZE);
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const uint64_t code_start = ADDR[ADDR__init__];
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OK(uc_emu_start(uc, code_start, ADDR[ADDR__init__+1], 0, 0));
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uint32_t r_pc;
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OK(uc_reg_read(uc, UC_AVR_REG_PC, &r_pc));
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TEST_CHECK(r_pc == ADDR[ADDR__init__+1]);
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uint32_t r_sp = MEM_BASE + MEM_SIZE - 1;
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OK(uc_reg_write(uc, UC_AVR_REG_SP, &r_sp));
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const uint64_t exits[] = {
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ADDR[ADDR_main],
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ADDR[ADDR__stop_program]
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};
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OK(uc_ctl_exits_enable(uc));
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OK(uc_ctl_set_exits(uc, exits, ARRAY_ELEMS(exits)));
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const uint64_t code_main = ADDR[ADDR_main];
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OK(uc_emu_start(uc, code_main, 0, 0, 0));
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uint8_t r[32] = {0,};
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OK(uc_reg_read(uc, UC_AVR_REG_R25, &r[25]));
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OK(uc_reg_read(uc, UC_AVR_REG_R24, &r[24]));
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TEST_CHECK(r[25] == 0 && r[24] == 0);
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OK(uc_close(uc));
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}
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TEST_LIST = {
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{"test_avr_basic_alu", test_avr_basic_alu},
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{"test_avr_basic_mem", test_avr_basic_mem},
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{"test_avr_full_exec", test_avr_full_exec},
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{NULL, NULL}
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};

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