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bsp: k230: add watchdog driver
Signed-off-by: Wang Chen <[email protected]>
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‎bsp/k230/drivers/interdrv/wdt/SConscript

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# RT-Thread building script for component
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from building import *
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cwd = GetCurrentDir()
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src = Glob('*.c') + Glob('*.S')
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CPPPATH = [cwd]
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group = DefineGroup('WDT', src, depend = ['RT_USING_WDT'], CPPPATH = CPPPATH)
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objs = [group]
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list = os.listdir(cwd)
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for item in list:
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if os.path.isfile(os.path.join(cwd, item, 'SConscript')):
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objs = objs + SConscript(os.path.join(item, 'SConscript'))
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Return('objs')

‎bsp/k230/drivers/interdrv/wdt/drv_wdt.c

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/* Copyright (c) 2023, Canaan Bright Sight Co., Ltd
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
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* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
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* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
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* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <rtthread.h>
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#include <rtdevice.h>
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#include <riscv_io.h>
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#include "board.h"
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#include "ioremap.h"
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#include "sysctl_clk.h"
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#include "drv_wdt.h"
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#include <rtdbg.h>
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#include <sys/ioctl.h>
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static rt_watchdog_t kd_watchdog;
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static kd_wdt_t *kd_wdt_reg;
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/* There are sixteen TOPs (timeout periods) that can be set in the watchdog. */
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static const rt_uint32_t *tops;
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static const rt_uint32_t kd_wdt_fix_tops[KD_WDT_NUM_TOPS] = {
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KD_WDT_FIX_TOP(0), KD_WDT_FIX_TOP(1), KD_WDT_FIX_TOP(2),
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KD_WDT_FIX_TOP(3), KD_WDT_FIX_TOP(4), KD_WDT_FIX_TOP(5),
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KD_WDT_FIX_TOP(6), KD_WDT_FIX_TOP(7), KD_WDT_FIX_TOP(8),
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KD_WDT_FIX_TOP(9), KD_WDT_FIX_TOP(10), KD_WDT_FIX_TOP(11),
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KD_WDT_FIX_TOP(12), KD_WDT_FIX_TOP(13), KD_WDT_FIX_TOP(14),
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KD_WDT_FIX_TOP(15)
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};
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static struct kd_wdt_timeout timeouts[KD_WDT_NUM_TOPS];
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static char rmod; //wdt reset mode,
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static void kd_wdt_timeouts_init(void)
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{
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rt_uint32_t wdt_clk;
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rt_uint32_t time_value;
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rt_uint32_t i, t;
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rt_uint64_t msec;
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struct kd_wdt_timeout tout, *dst;
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/* caculate timeout value */
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wdt_clk = sysctl_clk_get_leaf_freq(SYSCTL_CLK_WDT_1_CLK);
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for (i = 0; i < KD_WDT_NUM_TOPS; ++i)
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{
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tout.top_val = i;
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tout.sec = tops[i] / wdt_clk;
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msec = (rt_uint64_t)tops[i] * (rt_uint64_t)1000L;
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msec = msec / wdt_clk;
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tout.msec = msec - (rt_uint64_t)tout.sec * (rt_uint64_t)1000L;
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for (t = 0; t < i; ++t)
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{
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dst = &timeouts[t];
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if (tout.sec > dst->sec || (tout.sec == dst->sec &&
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tout.msec >= dst->msec))
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continue;
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else
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swap(*dst, tout);
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}
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timeouts[i] = tout;
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}
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rt_kprintf("watchdog timeout table init OK!\n");
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}
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static rt_err_t kd_wdt_feed(rt_watchdog_t *wdt)
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{
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kd_wdt_t *reg = (kd_wdt_t *)wdt->parent.user_data;
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reg->crr = 0x76;
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return RT_EOK;
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}
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static rt_err_t kd_wdt_enable(rt_watchdog_t *wdt)
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{
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kd_wdt_t *reg = (kd_wdt_t *)wdt->parent.user_data;
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reg->crr = 0x76;
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reg->cr |= 0x1;
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return RT_EOK;
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}
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static rt_err_t kd_wdt_disable(rt_watchdog_t *wdt)
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{
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kd_wdt_t *reg = (kd_wdt_t *)wdt->parent.user_data;
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reg->crr = 0x76;
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reg->cr &= ~0x1;
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return RT_EOK;
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}
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static rt_err_t kd_wdt_set_timeout(rt_watchdog_t *wdt, rt_uint64_t timeout)
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{
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kd_wdt_t *reg = (kd_wdt_t *)wdt->parent.user_data;
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rt_uint32_t top_val;
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rt_uint32_t i;
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rt_uint32_t time = (timeout + rmod -1) / rmod;
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for (i = 0; i < KD_WDT_NUM_TOPS; ++i)
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{
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if (timeouts[i].sec >= time)
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break;
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}
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if (i == KD_WDT_NUM_TOPS)
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--i;
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top_val = timeouts[i].top_val;
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reg->torr = (top_val << 4) | (top_val << 0);
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return RT_EOK;
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}
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static rt_err_t kd_wdt_get_timeout(rt_watchdog_t *wdt, void *timeout)
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{
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rt_uint64_t top_val;
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rt_uint32_t i;
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kd_wdt_t *reg = (kd_wdt_t *)wdt->parent.user_data;
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top_val = ((reg->torr) & 0xf);
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for (i = 0; i < KD_WDT_NUM_TOPS; ++i)
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{
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if (timeouts[i].top_val == top_val)
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break;
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}
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*((rt_uint64_t *)timeout) = timeouts[i].sec * rmod;
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return RT_EOK;
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}
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static rt_err_t kd_wdt_init(rt_watchdog_t *wdt)
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{
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kd_wdt_t *reg = (kd_wdt_t *)wdt->parent.user_data;
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reg->cr &= ~(0x01 << 1);
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reg->cr |= (0x0 << 1); //default set wdt reset mode
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rmod = KD_WDT_RMOD_RESET;
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if (reg->comp_param_1 & (1 << 6))
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{
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tops = kd_wdt_fix_tops;
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}
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kd_wdt_timeouts_init();
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if (!timeouts[KD_WDT_NUM_TOPS - 1].sec)
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{
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rt_kprintf("No any valid Timeout period detected\n");
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return -RT_EINVAL;
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}
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return RT_EOK;
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}
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static rt_err_t kd_wdt_control(rt_watchdog_t *wdt, int cmd, void *args)
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{
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RT_ASSERT(wdt != NULL);
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kd_wdt_t *reg = (kd_wdt_t *)wdt->parent.user_data;
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switch(cmd)
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{
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case KD_DEVICE_CTRL_WDT_GET_TIMEOUT:
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kd_wdt_get_timeout(wdt, args);
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break;
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case KD_DEVICE_CTRL_WDT_SET_TIMEOUT:
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kd_wdt_set_timeout(wdt, *((rt_uint32_t*)args));
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break;
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case KD_DEVICE_CTRL_WDT_KEEPALIVE:
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kd_wdt_feed(wdt);
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break;
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case KD_DEVICE_CTRL_WDT_START:
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kd_wdt_enable(wdt);
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break;
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case RT_DEVICE_CTRL_WDT_STOP:
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case KD_DEVICE_CTRL_WDT_STOP:
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kd_wdt_disable(wdt);
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break;
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default:
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return -RT_EINVAL;
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}
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return RT_EOK;
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}
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static struct rt_watchdog_ops kd_wdt_ops =
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{
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.init = kd_wdt_init,
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.control = kd_wdt_control,
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};
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int rt_hw_wdt_init(void)
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{
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rt_err_t ret = RT_EOK;
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kd_wdt_reg = (kd_wdt_t *)rt_ioremap((void *)WDT1_BASE_ADDR, WDT1_IO_SIZE);
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kd_watchdog.ops = &kd_wdt_ops;
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ret = rt_hw_watchdog_register(&kd_watchdog, "watchdog1", RT_DEVICE_FLAG_RDWR, kd_wdt_reg);
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if (ret != RT_EOK)
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{
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LOG_E("rt device register failed %d\n", ret);
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}
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#ifndef RT_FASTBOOT
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rt_kprintf("watchdog register OK!\n");
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#endif
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return ret;
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}
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INIT_DEVICE_EXPORT(rt_hw_wdt_init);

‎bsp/k230/drivers/interdrv/wdt/drv_wdt.h

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/*
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* Copyright (c) 2011-2022, Shanghai Real-Thread Electronic Technology Co.,Ltd
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*
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* Change Logs:
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* Date Author Notes
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* 2022-04-01 SummerGift add i2c driver
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*/
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#ifndef DRV_WDT_H_
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#define DRV_WDT_H_
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#include <drivers/dev_watchdog.h>
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#include <sys/ioctl.h>
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#define DEFUALT_TIMEOUT 30*1000 /* ms */
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#define KD_WDT_NUM_TOPS 16
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#define KD_WDT_FIX_TOP(_idx) (1U << (16 + _idx))
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#define KD_WDT_RMOD_RESET 1
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#define KD_WDT_RMOD_IRQ 2
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#define KD_DEVICE_CTRL_WDT_GET_TIMEOUT _IOW('W', 1, int) /* get timeout(in seconds) */
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#define KD_DEVICE_CTRL_WDT_SET_TIMEOUT _IOW('W', 2, int) /* set timeout(in seconds) */
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#define KD_DEVICE_CTRL_WDT_GET_TIMELEFT _IOW('W', 3, int) /* get the left time before reboot(in seconds) */
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#define KD_DEVICE_CTRL_WDT_KEEPALIVE _IOW('W', 4, int) /* refresh watchdog */
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#define KD_DEVICE_CTRL_WDT_START _IOW('W', 5, int) /* start watchdog */
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#define KD_DEVICE_CTRL_WDT_STOP _IOW('W', 6, int) /* stop watchdog */
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struct kd_wdt_timeout {
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rt_uint32_t top_val;
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rt_uint32_t sec;
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rt_uint32_t msec;
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};
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#define swap(a, b) \
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do { struct kd_wdt_timeout __tmp = (a); (a) = (b); (b) = __tmp; } while (0)
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/* wdt register map */
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typedef struct _wdt
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{
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/* WDT Control Register (0x00) */
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volatile uint32_t cr;
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/* WDT Timeout Range Register (0x04) */
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volatile uint32_t torr;
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/* WDT Current Counter Value Register (0x08) */
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volatile uint32_t ccvr;
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/* WDT Counter Restart Register (0x0c) */
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volatile uint32_t crr;
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/* WDT Interrupt Status Register (0x10) */
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volatile uint32_t stat;
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/* WDT Interrupt Clear Register (0x14) */
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volatile uint32_t eoi;
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/* reserverd (0x18) */
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volatile uint32_t resv1;
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/* WDT Protection level Register (0x1c) */
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volatile uint32_t prot_level;
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/* reserved (0x20-0xe0) */
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volatile uint32_t resv4[49];
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/* WDT Component Parameters Register 5 (0xe4) */
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volatile uint32_t comp_param_5;
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/* WDT Component Parameters Register 4 (0xe8) */
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volatile uint32_t comp_param_4;
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/* WDT Component Parameters Register 3 (0xec) */
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volatile uint32_t comp_param_3;
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/* WDT Component Parameters Register 2 (0xf0) */
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volatile uint32_t comp_param_2;
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/* WDT Component Parameters Register 1 (0xf4) */
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volatile uint32_t comp_param_1;
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/* WDT Component Version Register (0xf8) */
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volatile uint32_t comp_version;
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/* WDT Component Type Register (0xfc) */
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volatile uint32_t comp_type;
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} __attribute__((packed, aligned(4))) kd_wdt_t;
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#endif /* DRV_WDT_H_ */

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