Fix spelling (#15)

Author: usbalbin

README.md

@@ -1,10 +1,10 @@
 # stm32-hrtim
 
-This crate implements a driver for the HRTIM peripheral found in select devices from F3, G4 and H7 series of STM32 microcontrollers. The HRTIM peripheral is a high resolution timer that allows precise control even at higher frequencies.
+This crate implements a driver for the HRTIM peripheral found in select devices from F3, G4 and H7 series of STM32 micro controllers. The HRTIM peripheral is a high resolution timer that allows precise control even at higher frequencies.
 
 The HRTIM is primarily intended to drive power conversion systems such as switch mode power
 supplies or lighting systems, but can be of general purpose usage, whenever a very fine
-timing resolution is expected. It is very flexible allowing complicated waveforms and suport connections to various other peripherals like DACs, ADCs, comparators, other timers, DMA etc.
+timing resolution is expected. It is very flexible allowing complicated waveforms and support connections to various other peripherals like DACs, ADCs, comparators, other timers, DMA etc.
 
 ### Status
 

src/capture.rs

@@ -70,7 +70,7 @@ pub trait HrCapture {
         }
     }
 
-    /// Get number of ticks relative to beginning of upcounting
+    /// Get number of ticks relative to beginning of up counting
     ///
     /// where captures during down counting count as negative (before the upcount)
     ///
@@ -87,7 +87,7 @@ pub trait HrCapture {
     /// Negative result | positive result
     /// ```
     ///
-    /// NOTE: This function will use [`Self::is_pending`] to chech if there is a value available and
+    /// NOTE: This function will use [`Self::is_pending`] to check if there is a value available and
     /// [`Self::clear_interrupt`] to clear it.
     fn get_signed(&mut self, period: u16) -> Option<i32> {
         if self.is_pending() {
@@ -101,7 +101,7 @@ pub trait HrCapture {
 
     fn get_last(&self) -> (u16, CountingDirection);
 
-    /// Get number of ticks relative to beginning of upcounting
+    /// Get number of ticks relative to beginning of up counting
     ///
     /// where captures during down counting count as negative (before the upcount)
     ///
@@ -190,15 +190,15 @@ impl<TIM: InstanceX, CH: ChExt, PSCL> HrCapt<TIM, PSCL, CH, NoDma> {
 
     // TODO: It would be sufficient to instead of hr_control only require exclusive access to the owning timer
     // however that would be hard to do since typically the capture device is a field of that same timer.
-    // Would it make more sense to have this method direcly on HrTim instead?
+    // Would it make more sense to have this method directly on HrTim instead?
     pub fn enable_interrupt(&mut self, enable: bool, _hr_control: &mut super::HrPwmControl) {
         let tim = unsafe { &*TIM::ptr() };
 
         tim.dier().modify(|_r, w| w.cptie(CH::CH as _).bit(enable));
     }
 
     pub fn enable_dma(self, _ch: timer::DmaChannel<TIM>) -> HrCapt<TIM, PSCL, CH, Dma> {
-        // SAFETY: We own the only insance of this timers dma channel, no one else can do this
+        // SAFETY: We own the only instance of this timers dma channel, no one else can do this
         let tim = unsafe { &*TIM::ptr() };
         tim.dier().modify(|_r, w| w.cptde(CH::CH as _).set_bit());
         HrCapt { _x: PhantomData }

src/control.rs

@@ -293,7 +293,7 @@ impl<'a> Foo<'a> {
 }
 
 impl HrPwmCtrl {
-    /// Start/stop mutliple timers at the exact same time
+    /// Start/stop multiple timers at the exact same time
     ///
     /// ```
     /// let mut timer_a = ...;

src/lib.rs

@@ -110,7 +110,7 @@ pub enum HrTimerMode {
 
 #[derive(Copy, Clone, PartialEq, Debug)]
 pub enum HrCountingDirection {
-    /// Asymetrical up counting mode
+    /// Asymmetrical up counting mode
     ///
     ///
     ///                   *                  *
@@ -155,7 +155,7 @@ pub enum HrCountingDirection {
     ///
     /// NOTE: This is incompatible with
     /// * Auto-delay
-    /// * Balanded Idle
+    /// * Balanced Idle
     /// * Triggered-half mode
     ///
     /// There is also differences in (including but not limited to) the following areas:
@@ -172,7 +172,7 @@ pub enum InterleavedMode {
     /// Dual interleaved or Half mode
     ///
     /// Automatically force
-    /// * Cr1 to PERIOD / 2 (not visable through `get_duty`).
+    /// * Cr1 to PERIOD / 2 (not visible through `get_duty`).
     ///
     /// Automatically updates when changing period
     ///
@@ -186,7 +186,7 @@ pub enum InterleavedMode {
     /// * Cr1 to 1 * PERIOD / 3 and
     /// * Cr2 to 2 * PERIOD / 3
     ///
-    /// (not visable through `get_duty`). Automatically updates when changing period.
+    /// (not visible through `get_duty`). Automatically updates when changing period.
     ///
     /// NOTE: Must not be used simultaneously with other modes
     /// using CMP2 (dual channel dac trigger and triggered-half modes).
@@ -200,7 +200,7 @@ pub enum InterleavedMode {
     /// * Cr2 to 2 * PERIOD / 4 and
     /// * Cr3 to 3 * PERIOD / 4
     ///
-    /// (not visable through `get_duty`). Automatically updates when changing period.
+    /// (not visible through `get_duty`). Automatically updates when changing period.
     ///
     /// NOTE: Must not be used simultaneously with other modes
     /// using CMP2 (dual channel dac trigger and triggered-half modes).
@@ -272,7 +272,7 @@ impl DacResetTrigger for DacResetOnOut1Set {
 ///
 /// The compare 2 has a particular operating mode when using `OnCmp2`. The active
 /// comparison value is automatically updated as soon as a compare match
-/// has occured, so that the trigger can be repeated periodically with a period
+/// has occurred, so that the trigger can be repeated periodically with a period
 /// equal to the CMP2 value.
 ///
 /// NOTE:
@@ -359,12 +359,12 @@ pub enum PreloadSource {
     /// Preloaded registers are updated by master timer update
     OnMasterTimerUpdate,
 
-    /// Prealoaded registers are updaten when the counter rolls over and the repetition counter is 0
+    /// Prealoaded registers are updated when the counter rolls over and the repetition counter is 0
     OnRepetitionUpdate,
 }
 
 pub enum MasterPreloadSource {
-    /// Prealoaded registers are updaten when the master counter rolls over and the master repetition counter is 0
+    /// Preloaded registers are updated when the master counter rolls over and the master repetition counter is 0
     OnMasterRepetitionUpdate,
 }
 
@@ -477,7 +477,7 @@ macro_rules! hrtim_finalize_body {
                 } = deadtime;
 
                 // SAFETY: DeadtimeConfig makes sure rising and falling values are valid
-                // and DeadtimePrescaler has its own garantuee
+                // and DeadtimePrescaler has its own guarantee
                 tim.dtr().modify(|_r, w| w
                     .dtprsc().bits(prescaler as u8)
                     .dtr().bits(deadtime_rising_value)

src/timer_eev_cfg.rs

@@ -14,7 +14,7 @@ pub struct EevCfgs<TIM> {
 
     // TODO: Expose these
     // TODO: Note there are some peculiarities here with fast mode
-    // One way to prevent missuse would be to require a borrowed ExternalEventSource<IS_FAST> when setting
+    // One way to prevent misuse would be to require a borrowed ExternalEventSource<IS_FAST> when setting
     // filter/latching as well as the event_counter related settings below.
     #[cfg(feature = "hrtim_v2")]
     pub(crate) event_counter_enable_bit: bool,