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Examples for all devices compiles
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+53
-24
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2 files changed

+53
-24
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examples/stm32f3/hrtim.rs

Lines changed: 34 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -7,13 +7,13 @@ use stm32_hrtim::{
77
compare_register::HrCompareRegister, control::HrControltExt, output::HrOutput, timer::HrTimer,
88
HrParts, HrPwmAdvExt, Pscl4,
99
};
10-
use stm32g4xx_hal::{
11-
delay::{DelayExt, SYSTDelayExt},
10+
use stm32f3xx_hal::{
11+
delay::Delay,
12+
flash::FlashExt as _,
1213
gpio::GpioExt,
13-
pwr::PwrExt,
14-
rcc::{self, RccExt},
15-
stm32::{CorePeripherals, Peripherals},
16-
time::ExtU32,
14+
pac::{CorePeripherals, Peripherals},
15+
prelude::{_embedded_hal_blocking_delay_DelayMs, _stm32f3xx_hal_time_rate_Extensions},
16+
rcc::RccExt,
1717
};
1818

1919
#[entry]
@@ -22,18 +22,28 @@ fn main() -> ! {
2222

2323
let dp = Peripherals::take().expect("cannot take peripherals");
2424
let cp = CorePeripherals::take().expect("cannot take core");
25-
// Set system frequency to 16MHz * 15/1/2 = 120MHz
26-
// This would lead to HrTim running at 120MHz * 32 = 3.84...
27-
let pwr = dp.PWR.constrain().freeze();
28-
let mut rcc = Input to hrtim needs to be 128MHz when using HSI, 128-144 with HSE
2925

30-
let mut delay = cp.SYST.delay(&rcc.clocks);
26+
let mut flash = dp.FLASH.constrain();
27+
let mut rcc = dp.RCC.constrain();
28+
let mut gpioa = dp.GPIOA.split(&mut rcc.ahb);
29+
30+
//let mut rcc = Input to hrtim needs to be 128MHz when using HSI, 128-144 with HSE
31+
32+
// Set system frequency to 64MHz using PLL, PLLCLKx2 will thus be 128MHz which
33+
// feeds into the HRTIM. This and the HRTIM's DLL would lead to an effective
34+
// HRTIM frequency of 128MHz * 32 = 4.096GHz...
35+
let clocks = rcc
36+
.cfgr
37+
.sysclk(64_u32.MHz())
38+
.use_pll()
39+
.freeze(&mut flash.acr);
40+
41+
let mut delay = Delay::new(cp.SYST, clocks);
3142

3243
// ...with a prescaler of 4 this gives us a HrTimer with a tick rate of 960MHz
3344
// With max the max period set, this would be 960MHz/2^16 ~= 15kHz...
3445
let prescaler = Pscl4;
3546

36-
let gpioa = dp.GPIOA.split(&mut rcc);
3747
let pin_a = gpioa.pa8;
3848
let pin_b = gpioa.pa9;
3949

@@ -49,7 +59,10 @@ fn main() -> ! {
4959
// ------------------------ ---------------------------- ----
5060
// . . . .
5161
// . . . .
52-
let (hr_control, ..) = dp.HRTIM_COMMON.hr_control(&mut rcc).wait_for_calibration();
62+
let (hr_control, ..) = dp
63+
.HRTIM_COMMON
64+
.hr_control(&clocks, &mut rcc.apb2)
65+
.wait_for_calibration();
5366
let mut hr_control = hr_control.constrain();
5467

5568
let HrParts {
@@ -59,14 +72,19 @@ fn main() -> ! {
5972
..
6073
} = dp
6174
.HRTIM_TIMA
62-
.pwm_advanced((pin_a, pin_b), &mut rcc)
75+
.pwm_advanced((pin_a, pin_b))
6376
.prescaler(prescaler)
6477
.period(0xFFFF)
6578
.push_pull_mode(true) // Set push pull mode, out1 and out2 are
6679
// alternated every period with one being
6780
// inactive and the other getting to output its wave form
6881
// as normal
69-
.finalize(&mut hr_control);
82+
.finalize(
83+
&mut hr_control,
84+
&mut gpioa.moder,
85+
&mut gpioa.otyper,
86+
&mut gpioa.afrh,
87+
);
7088

7189
out1.enable_rst_event(&cr1); // Set low on compare match with cr1
7290
out2.enable_rst_event(&cr1);
@@ -85,7 +103,7 @@ fn main() -> ! {
85103
cr1.set_duty(new_period / 3);
86104
timer.set_period(new_period);
87105

88-
delay.delay(500_u32.millis());
106+
delay.delay_ms(500_u16);
89107
}
90108
}
91109
}

src/control.rs

Lines changed: 19 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -17,19 +17,30 @@ use stm32::HRTIM_COMMON;
1717
use super::{external_event::EevInputs, fault::FaultInputs};
1818

1919
pub trait HrControltExt {
20-
#[cfg(feature = "stm32h7")]
21-
fn hr_control(self, _rcc: hal::rcc::rec::Hrtim) -> HrTimOngoingCalibration;
20+
fn hr_control(
21+
self,
22+
#[cfg(feature = "stm32f3")] _clocks: &hal::rcc::Clocks,
23+
#[cfg(feature = "stm32f3")] apb2: &mut hal::rcc::APB2,
2224

23-
#[cfg(not(feature = "stm32h7"))]
24-
fn hr_control(self, _rcc: &mut hal::rcc::Rcc) -> HrTimOngoingCalibration;
25+
#[allow(unused_variables)]
26+
#[cfg(feature = "stm32g4")]
27+
rcc: &mut hal::rcc::Rcc,
28+
29+
#[cfg(feature = "stm32h7")] rcc: hal::rcc::rec::Hrtim,
30+
) -> HrTimOngoingCalibration;
2531
}
2632

2733
impl HrControltExt for HRTIM_COMMON {
28-
fn hr_control(self,
29-
#[cfg(feature = "stm32h7")] rcc: hal::rcc::rec::Hrtim,
34+
fn hr_control(
35+
self,
36+
#[cfg(feature = "stm32f3")] _clocks: &hal::rcc::Clocks,
37+
#[cfg(feature = "stm32f3")] apb2: &mut hal::rcc::APB2,
3038

3139
#[allow(unused_variables)]
32-
#[cfg(not(feature = "stm32h7"))] rcc: &mut hal::rcc::Rcc,
40+
#[cfg(feature = "stm32g4")]
41+
rcc: &mut hal::rcc::Rcc,
42+
43+
#[cfg(feature = "stm32h7")] rcc: hal::rcc::rec::Hrtim,
3344
) -> HrTimOngoingCalibration {
3445
let common = unsafe { &*HRTIM_COMMON::ptr() };
3546

@@ -41,7 +52,7 @@ impl HrControltExt for HRTIM_COMMON {
4152

4253
#[cfg(feature = "stm32f3")]
4354
{
44-
&mut rcc.apb2
55+
apb2
4556
}
4657

4758
#[cfg(feature = "stm32h7")]

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