diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml index 2e87e9d..aa0f3d8 100644 --- a/.github/workflows/ci.yml +++ b/.github/workflows/ci.yml @@ -15,9 +15,7 @@ jobs: rust: - stable device: - - stm32f334x4 - - stm32f334x6 - - stm32f334x8 + - stm32f334 - stm32h742 - stm32h743 diff --git a/Cargo.toml b/Cargo.toml index 00e433c..35454e0 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -3,21 +3,17 @@ name = "stm32-hrtim" version = "0.1.0" edition = "2021" -[dependencies] +[patch.crates-io] +stm32-hrtim = { path = "." } + +[patch."https://github.com/usbalbin/stm32-hrtim"] +stm32-hrtim = { path = "." } +[dependencies] stm32f3 = { git = "https://github.com/stm32-rs/stm32-rs-nightlies", optional = true } -stm32h7 = { git = "https://github.com/stm32-rs/stm32-rs-nightlies", fatures = ["critical-section"], optional = true } -#stm32g4 = { git = "", optional = true } - -#stm32f3xx-hal = { version = "0.10.0", optional = true } -stm32f3xx-hal = { git = "https://github.com/usbalbin/stm32f3xx-hal", branch = "update_for_new_pac", optional = true } -#stm32h7xx-hal = { version = "0.16.0", optional = true } -stm32h7xx-hal = { git = "https://github.com/usbalbin/stm32h7xx-hal", branch = "update_for_new_pac", optional = true } -#stm32h7xx-hal = { path = "../stm32h7xx-hal", optional = true } - -#stm32g4xx-hal = { version = "0.0.1", optional = true } -stm32g4xx-hal = { git = "https://github.com/stm32-rs/stm32g4xx-hal", branch = "staged-pac", optional = true } -#stm32g4xx-hal = { path = "../stm32g4xx-hal", optional = true } +stm32h7 = { git = "https://github.com/stm32-rs/stm32-rs-nightlies", features = ["critical-section"], optional = true } +stm32g4 = { version = "0.22.0", package = "stm32g4-staging", optional = true } + defmt = { version = "0.3.10", optional = true } fugit = "0.3.7" @@ -26,6 +22,7 @@ cortex-m = { version = "0.7.7", features = ["critical-section-single-core"] } defmt-rtt = "0.4.0" cortex-m-rt = "0.7.2" panic-probe = { version = "0.3.0", features = ["print-defmt"] } +stm32g4xx-hal = { git = "https://github.com/usbalbin/stm32g4xx-hal", branch = "hrtim", features = ["defmt", "hrtim"] } [features] default = [] @@ -38,30 +35,20 @@ stm32f3 = ["stm32f3/stm32f3x4"] stm32h7 = ["dep:stm32h7"] stm32g4 = [] -stm32f334x4 = ["stm32f3", "stm32f3xx-hal/stm32f334x4", "hrtim_v1"] -stm32f334x6 = ["stm32f3", "stm32f3xx-hal/stm32f334x6", "hrtim_v1"] -stm32f334x8 = ["stm32f3", "stm32f3xx-hal/stm32f334x8", "hrtim_v1"] - -stm32h742 = ["stm32h7", "stm32h7xx-hal/stm32h742", "hrtim_v1_1"] -stm32h743 = ["stm32h7", "stm32h7xx-hal/stm32h743", "hrtim_v1_1"] -#stm32h745 = ["stm32h7", "stm32h7xx-hal/stm32h745", "hrtim_v1_1"] -stm32h747cm7 = ["stm32h7", "stm32h7xx-hal/stm32h747cm7", "hrtim_v1_1"] -stm32h750 = ["stm32h7", "stm32h7xx-hal/stm32h750", "hrtim_v1_1"] -stm32h753 = ["stm32h7", "stm32h7xx-hal/stm32h753", "hrtim_v1_1"] -#stm32h755 = ["stm32h7", "stm32h7xx-hal/stm32h755", "hrtim_v1_1"] -#stm32h757 = ["stm32h7", "stm32h7xx-hal/stm32h757", "hrtim_v1_1"] - -stm32g474 = ["stm32g4", "stm32g4xx-hal/stm32g474", "hrtim_v2"] -stm32g484 = ["stm32g4", "stm32g4xx-hal/stm32g484", "hrtim_v2"] -defmt = ["dep:defmt", "fugit/defmt"] +stm32f334 = ["stm32f3/stm32f3x4", "hrtim_v1"] -# F3 - -[[example]] -name = "stm32f3" -required-features = ["stm32f3"] -path = "examples/stm32f3/hrtim.rs" +stm32h742 = ["stm32h7/stm32h742", "hrtim_v1_1"] +stm32h743 = ["stm32h7/stm32h743", "hrtim_v1_1"] +#stm32h745 = ["stm32h7/stm32h745", "hrtim_v1_1"] +stm32h747cm7 = ["stm32h7/stm32h747cm7", "hrtim_v1_1"] +stm32h750 = ["stm32h7/stm32h750", "hrtim_v1_1"] +stm32h753 = ["stm32h7/stm32h753", "hrtim_v1_1"] +#stm32h755 = ["stm32h7/stm32h755", "hrtim_v1_1"] +#stm32h757 = ["stm32h7/stm32h757", "hrtim_v1_1"] +stm32g474 = ["stm32g4/stm32g474", "stm32g4xx-hal/stm32g474", "hrtim_v2"] +stm32g484 = ["stm32g4/stm32g484", "stm32g4xx-hal/stm32g484", "hrtim_v2"] +defmt = ["dep:defmt", "fugit/defmt"] # G4 @@ -108,11 +95,4 @@ path = "examples/stm32g4/hrtim.rs" [[example]] name = "stm32g4-master" required-features = ["stm32g4"] -path = "examples/stm32g4/master.rs" - -# H7 - -[[example]] -name = "stm32h7" -required-features = ["stm32h7"] -path = "examples/stm32h7/hrtim.rs" \ No newline at end of file +path = "examples/stm32g4/master.rs" \ No newline at end of file diff --git a/examples/stm32f3/hrtim.rs b/examples/stm32f3/hrtim.rs deleted file mode 100644 index 61d52cb..0000000 --- a/examples/stm32f3/hrtim.rs +++ /dev/null @@ -1,107 +0,0 @@ -#![no_std] -#![no_main] - -use cortex_m_rt::entry; -use panic_probe as _; -use stm32_hrtim::{ - compare_register::HrCompareRegister, control::HrControltExt, output::HrOutput, timer::HrTimer, - HrParts, HrPwmAdvExt, Pscl4, -}; -use stm32f3xx_hal::{ - delay::Delay, - flash::FlashExt as _, - gpio::GpioExt, - pac::{CorePeripherals, Peripherals}, - prelude::{_embedded_hal_blocking_delay_DelayMs, _stm32f3xx_hal_time_rate_Extensions}, - rcc::RccExt, -}; - -#[entry] -fn main() -> ! { - defmt::info!("Initializing..."); - - let dp = Peripherals::take().expect("cannot take peripherals"); - let cp = CorePeripherals::take().expect("cannot take core"); - - let mut flash = dp.FLASH.constrain(); - let mut rcc = dp.RCC.constrain(); - let mut gpioa = dp.GPIOA.split(&mut rcc.ahb); - - // Set system frequency to 64MHz using PLL, PLLCLKx2 will thus be 128MHz which - // feeds into the HRTIM. This and the HRTIM's DLL would lead to an effective - // HRTIM frequency of 128MHz * 32 = 4.096GHz... - let clocks = rcc - .cfgr - .sysclk(64_u32.MHz()) - .use_pll() - .freeze(&mut flash.acr); - - let mut delay = Delay::new(cp.SYST, clocks); - - // ...with a prescaler of 4 this gives us a HrTimer with a tick rate of 1024MHz - // With max the max period set, this would be 1024MHz/2^16 ~= 15.6kHz... - let prescaler = Pscl4; - - let pin_a = gpioa.pa8; - let pin_b = gpioa.pa9; - - // . . . . - // . 30% . . . - // ---- . .---- . - //out1 | | . | | . - // | | . | | . - // -------- ---------------------------- -------------------- - // . .---- . .---- - //out2 . | | . | | - // . | | . | | - // ------------------------ ---------------------------- ---- - // . . . . - // . . . . - let (hr_control, ..) = dp - .HRTIM_COMMON - .hr_control(&clocks, &mut rcc.apb2) - .wait_for_calibration(); - let mut hr_control = hr_control.constrain(); - - let HrParts { - mut timer, - mut cr1, - out: (mut out1, mut out2), - .. - } = dp - .HRTIM_TIMA - .pwm_advanced((pin_a, pin_b)) - .prescaler(prescaler) - .period(0xFFFF) - .push_pull_mode(true) // Set push pull mode, out1 and out2 are - // alternated every period with one being - // inactive and the other getting to output its wave form - // as normal - .finalize( - &mut hr_control, - &mut gpioa.moder, - &mut gpioa.otyper, - &mut gpioa.afrh, - ); - - out1.enable_rst_event(&cr1); // Set low on compare match with cr1 - out2.enable_rst_event(&cr1); - - out1.enable_set_event(&timer); // Set high at new period - out2.enable_set_event(&timer); - - out1.enable(); - out2.enable(); - - loop { - // Step frequency from 15.6kHz to about 156kHz(half of that when only looking at one pin) - for i in 1..=10 { - let new_period = u16::MAX / i; - - cr1.set_duty(new_period / 3); - timer.set_period(new_period); - - delay.delay_ms(500_u16); - } - } -} diff --git a/examples/stm32g4/adc-trigger.rs b/examples/stm32g4/adc-trigger.rs index 3150ec6..05505c7 100644 --- a/examples/stm32g4/adc-trigger.rs +++ b/examples/stm32g4/adc-trigger.rs @@ -5,14 +5,15 @@ use cortex_m_rt::entry; use panic_probe as _; use stm32_hrtim::{ - compare_register::HrCompareRegister, control::HrControltExt, output::HrOutput, timer::HrTimer, - HrParts, HrPwmAdvExt, Pscl4, + compare_register::HrCompareRegister, output::HrOutput, timer::HrTimer, HrParts, HrPwmAdvExt, + Pscl4, }; use stm32g4xx_hal::{ adc::{self, AdcClaim, ClockSource, Temperature, Vref}, delay::SYSTDelayExt, dma::{self, channel::DMAExt, config::DmaConfig, TransferExt}, gpio::GpioExt, + hrtim::{HrControltExt, HrPwmBuilderExt}, pwr::PwrExt, rcc::{self, RccExt}, stm32::{CorePeripherals, Peripherals}, diff --git a/examples/stm32g4/capture-dma.rs b/examples/stm32g4/capture-dma.rs index 9ea1341..bd55126 100644 --- a/examples/stm32g4/capture-dma.rs +++ b/examples/stm32g4/capture-dma.rs @@ -7,7 +7,6 @@ use panic_probe as _; use stm32_hrtim::{ capture, compare_register::HrCompareRegister, - control::HrControltExt, external_event::{self, ToExternalEventSource}, output::HrOutput, timer::{HrSlaveTimerCpt, HrTimer, TimerSplitCapture}, @@ -16,6 +15,7 @@ use stm32_hrtim::{ use stm32g4xx_hal::{ dma::{channel::DMAExt, config::DmaConfig, TransferExt}, gpio::GpioExt, + hrtim::{external_event::EevInputExt, HrControltExt, HrPwmBuilderExt}, pwr::PwrExt, rcc::{self, RccExt}, stm32::Peripherals, diff --git a/examples/stm32g4/capture.rs b/examples/stm32g4/capture.rs index 522aaa2..85c1b26 100644 --- a/examples/stm32g4/capture.rs +++ b/examples/stm32g4/capture.rs @@ -7,7 +7,6 @@ use panic_probe as _; use stm32_hrtim::{ capture::HrCapture, compare_register::HrCompareRegister, - control::HrControltExt, external_event::{self, ToExternalEventSource}, output::HrOutput, timer::{HrSlaveTimerCpt, HrTimer}, @@ -15,6 +14,7 @@ use stm32_hrtim::{ }; use stm32g4xx_hal::{ gpio::GpioExt, + hrtim::{external_event::EevInputExt, HrControltExt, HrPwmBuilderExt}, pwr::PwrExt, rcc::{self, RccExt}, stm32::Peripherals, diff --git a/examples/stm32g4/eev-comp.rs b/examples/stm32g4/eev-comp.rs index a0804ee..ab196f9 100644 --- a/examples/stm32g4/eev-comp.rs +++ b/examples/stm32g4/eev-comp.rs @@ -7,19 +7,18 @@ use cortex_m_rt::entry; use panic_probe as _; use stm32_hrtim::{ compare_register::HrCompareRegister, - control::HrControltExt, external_event::{self, ToExternalEventSource}, output::HrOutput, timer::HrTimer, timer_eev_cfg::{EevCfg, EevCfgs}, - HrParts, HrPwmAdvExt, Pscl4, + HrParts, HrPwmAdvExt, Polarity, Pscl4, }; use stm32g4xx_hal::{ comparator::{self, ComparatorExt, ComparatorSplit}, dac::{self, DacExt, DacOut}, delay::SYSTDelayExt, gpio::{GpioExt, SignalEdge}, - pwm, + hrtim::{external_event::EevInputExt, HrControltExt, HrPwmBuilderExt}, pwr::PwrExt, rcc::{self, RccExt}, stm32::{CorePeripherals, Peripherals}, @@ -80,7 +79,7 @@ fn main() -> ! { .eev_input4 .bind(&comp1) .edge_or_polarity(external_event::EdgeOrPolarity::Polarity( - pwm::Polarity::ActiveHigh, + Polarity::ActiveHigh, )) .finalize(&mut hr_control); diff --git a/examples/stm32g4/eev.rs b/examples/stm32g4/eev.rs index aa245ba..0cf45e0 100644 --- a/examples/stm32g4/eev.rs +++ b/examples/stm32g4/eev.rs @@ -7,16 +7,15 @@ use cortex_m_rt::entry; use panic_probe as _; use stm32_hrtim::{ compare_register::HrCompareRegister, - control::HrControltExt, external_event::{self, ToExternalEventSource}, output::HrOutput, timer::HrTimer, timer_eev_cfg::EevCfgs, - HrParts, HrPwmAdvExt, Pscl4, + HrParts, HrPwmAdvExt, Polarity, Pscl4, }; use stm32g4xx_hal::{ gpio::GpioExt, - pwm, + hrtim::{external_event::EevInputExt, HrControltExt, HrPwmBuilderExt}, pwr::PwrExt, rcc::{self, RccExt}, stm32::Peripherals, @@ -50,7 +49,7 @@ fn main() -> ! { .eev_input3 .bind(gpiob.pb7.into_pull_down_input()) .edge_or_polarity(external_event::EdgeOrPolarity::Polarity( - pwm::Polarity::ActiveHigh, + Polarity::ActiveHigh, )) .finalize(&mut hr_control); diff --git a/examples/stm32g4/flt-comp.rs b/examples/stm32g4/flt-comp.rs index 4baa222..b0287b5 100644 --- a/examples/stm32g4/flt-comp.rs +++ b/examples/stm32g4/flt-comp.rs @@ -7,23 +7,10 @@ use cortex_m_rt::entry; use fugit::ExtU32 as _; use panic_probe as _; use stm32_hrtim::{ - compare_register::HrCompareRegister, - control::HrControltExt, - fault::{FaultAction, FaultMonitor}, - output::HrOutput, - timer::HrTimer, - HrParts, HrPwmAdvExt, Pscl4, + compare_register::HrCompareRegister, fault::{FaultAction, FaultMonitor}, output::HrOutput, timer::HrTimer, HrParts, HrPwmAdvExt, Polarity, Pscl4 }; use stm32g4xx_hal::{ - self as hal, - adc::AdcClaim, - comparator::{self, ComparatorExt, ComparatorSplit}, - dac::{Dac3IntSig1, DacExt, DacOut}, - delay::{DelayExt as _, SYSTDelayExt}, - gpio::GpioExt, - pwr::PwrExt, - rcc::{self, RccExt}, - stm32::{CorePeripherals, Peripherals}, + self as hal, adc::AdcClaim, comparator::{self, ComparatorExt, ComparatorSplit}, dac::{Dac3IntSig1, DacExt, DacOut}, delay::{DelayExt as _, SYSTDelayExt}, gpio::GpioExt, hrtim::{fault::FaultInput, HrControltExt, HrPwmBuilderExt}, pwr::PwrExt, rcc::{self, RccExt}, stm32::{CorePeripherals, Peripherals} }; #[entry] @@ -85,8 +72,8 @@ fn main() -> ! { let fault_source5 = flt_inputs .fault_input5 - .bind_comp(&comp3) - .polarity(hal::pwm::Polarity::ActiveHigh) + .bind(comp3) + .polarity(Polarity::ActiveHigh) .finalize(&mut hr_control); // ...with a prescaler of 4 this gives us a HrTimer with a tick rate of 960MHz @@ -137,9 +124,9 @@ fn main() -> ! { for _ in 0..5 { delay.delay(500_u32.millis()); defmt::info!( - "State: {:?}, comp: {}, is_fault_active: {}, pc1: {}", + "State: {:?}, comp: {}, is_fault_active: _, pc1: {}", out1.get_state(), - comp3.output(), + //comp3.output(), // TODO hr_control.fault_5.is_fault_active(), adc1.convert(&pc1, hal::adc::config::SampleTime::Cycles_92_5) ); diff --git a/examples/stm32g4/flt.rs b/examples/stm32g4/flt.rs index 991cdb4..3deff42 100644 --- a/examples/stm32g4/flt.rs +++ b/examples/stm32g4/flt.rs @@ -7,16 +7,15 @@ use cortex_m_rt::entry; use panic_probe as _; use stm32_hrtim::{ compare_register::HrCompareRegister, - control::HrControltExt, fault::{FaultAction, FaultMonitor}, output::HrOutput, timer::HrTimer, - HrParts, HrPwmAdvExt, Pscl4, + HrParts, HrPwmAdvExt, Polarity, Pscl4, }; use stm32g4xx_hal::{ - self as hal, delay::{DelayExt, SYSTDelayExt}, gpio::GpioExt, + hrtim::{fault::FaultInput, HrControltExt, HrPwmBuilderExt}, pwr::PwrExt, rcc::{self, RccExt}, stm32::{CorePeripherals, Peripherals}, @@ -50,8 +49,8 @@ fn main() -> ! { let fault_source3 = flt_inputs .fault_input3 - .bind_pin(gpiob.pb10.into_pull_down_input()) - .polarity(hal::pwm::Polarity::ActiveHigh) + .bind(gpiob.pb10.into_pull_down_input().into_alternate()) + .polarity(Polarity::ActiveHigh) .finalize(&mut hr_control); // ...with a prescaler of 4 this gives us a HrTimer with a tick rate of 1.2GHz diff --git a/examples/stm32g4/hrtim.rs b/examples/stm32g4/hrtim.rs index df1081c..8187ef3 100644 --- a/examples/stm32g4/hrtim.rs +++ b/examples/stm32g4/hrtim.rs @@ -4,16 +4,11 @@ use cortex_m_rt::entry; use panic_probe as _; use stm32_hrtim::{ - compare_register::HrCompareRegister, control::HrControltExt, output::HrOutput, timer::HrTimer, - HrParts, HrPwmAdvExt, Pscl4, + compare_register::HrCompareRegister, output::HrOutput, timer::HrTimer, HrParts, HrPwmAdvExt, + Pscl4, }; use stm32g4xx_hal::{ - delay::{DelayExt, SYSTDelayExt}, - gpio::GpioExt, - pwr::PwrExt, - rcc::{self, RccExt}, - stm32::{CorePeripherals, Peripherals}, - time::ExtU32, + delay::{DelayExt, SYSTDelayExt}, gpio::GpioExt, hrtim::{HrControltExt, HrPwmBuilderExt}, pwr::PwrExt, rcc::{self, RccExt}, stm32::{CorePeripherals, Peripherals}, time::ExtU32 }; #[entry] diff --git a/examples/stm32g4/master.rs b/examples/stm32g4/master.rs index 2edef09..8166507 100644 --- a/examples/stm32g4/master.rs +++ b/examples/stm32g4/master.rs @@ -5,18 +5,12 @@ use cortex_m_rt::entry; use panic_probe as _; use stm32_hrtim::{ compare_register::HrCompareRegister, - control::HrControltExt, output::HrOutput, timer::{HrSlaveTimer, HrTimer}, HrParts, HrPwmAdvExt, HrTimerMode, MasterPreloadSource, PreloadSource, Pscl4, }; use stm32g4xx_hal::{ - delay::{DelayExt, SYSTDelayExt}, - gpio::GpioExt, - pwr::PwrExt, - rcc::{self, RccExt}, - stm32::{CorePeripherals, Peripherals}, - time::ExtU32, + delay::{DelayExt, SYSTDelayExt}, gpio::GpioExt, hrtim::{HrControltExt, HrPwmBuilderExt}, pwr::PwrExt, rcc::{self, RccExt}, stm32::{CorePeripherals, Peripherals}, time::ExtU32 }; #[entry] diff --git a/examples/stm32h7/hrtim.rs b/examples/stm32h7/hrtim.rs deleted file mode 100644 index f117e91..0000000 --- a/examples/stm32h7/hrtim.rs +++ /dev/null @@ -1,109 +0,0 @@ -#![no_std] -#![no_main] - -use cortex_m_rt::entry; -use panic_probe as _; -use stm32_hrtim::{ - compare_register::HrCompareRegister, control::HrControltExt, output::HrOutput, timer::HrTimer, - HrParts, HrPwmAdvExt, Pscl1, -}; -use stm32h7xx_hal::{ - delay::DelayExt, - gpio::GpioExt, - prelude::_embedded_hal_blocking_delay_DelayMs, - pwr::PwrExt, - rcc::RccExt, - stm32::{CorePeripherals, Peripherals}, -}; - -use fugit::RateExtU32 as _; - -#[entry] -fn main() -> ! { - defmt::info!("Initializing..."); - - let dp = Peripherals::take().expect("cannot take peripherals"); - let cp = CorePeripherals::take().expect("cannot take core"); - - // Constrain and Freeze power - let pwr = dp.PWR.constrain(); - let pwrcfg = pwr.freeze(); - - // Constrain and Freeze clock - let rcc = dp.RCC.constrain(); - - // With a sys_ck of 240MHz and d1cpre of 1 if the HRTIM will be fed by 240MHz/1 = 240MHz - // since HRTIMSEL is set to take the HRTIM's clock directly from the core clock. The - // stm32h7 devices' HRTIM does not have a DLL, also leading to an effective HRTIM - // frequency of 240MHz... - let ccdr = rcc.sys_ck(240.MHz()).freeze(pwrcfg, &dp.SYSCFG); - - // Acquire the GPIO peripherals. This also enables the clock for - // the GPIOs in the RCC register. - let gpioc = dp.GPIOC.split(ccdr.peripheral.GPIOC); - - // Get the delay provider. - let mut delay = cp.SYST.delay(ccdr.clocks); - - // ...with a prescaler of 1 this gives us a HrTimer with a tick rate of 240MHz - // With max the max period set, this would be 240MHz/2^16 ~= 3.7kHz... - let prescaler = Pscl1; - - let pin_a = gpioc.pc6.into_input(); - let pin_b = gpioc.pc7.into_input(); - - // . . . . - // . 30% . . . - // ---- . .---- . - //out1 | | . | | . - // | | . | | . - // -------- ---------------------------- -------------------- - // . .---- . .---- - //out2 . | | . | | - // . | | . | | - // ------------------------ ---------------------------- ---- - // . . . . - // . . . . - let (hr_control, ..) = dp - .HRTIM_COMMON - .hr_control(&ccdr.clocks, ccdr.peripheral.HRTIM) - .wait_for_calibration(); - let mut hr_control = hr_control.constrain(); - - let HrParts { - mut timer, - mut cr1, - out: (mut out1, mut out2), - .. - } = dp - .HRTIM_TIMA - .pwm_advanced((pin_a, pin_b)) - .prescaler(prescaler) - .period(0xFFFF) - .push_pull_mode(true) // Set push pull mode, out1 and out2 are - // alternated every period with one being - // inactive and the other getting to output its wave form - // as normal - .finalize(&mut hr_control); - - out1.enable_rst_event(&cr1); // Set low on compare match with cr1 - out2.enable_rst_event(&cr1); - - out1.enable_set_event(&timer); // Set high at new period - out2.enable_set_event(&timer); - - out1.enable(); - out2.enable(); - - loop { - // Step frequency from 3.7kHz to about 36.6kHz(half of that when only looking at one pin) - for i in 1..10 { - let new_period = u16::MAX / i; - - cr1.set_duty(new_period / 3); - timer.set_period(new_period); - - delay.delay_ms(500_u16); - } - } -} diff --git a/src/adc_trigger.rs b/src/adc_trigger.rs index 133a42b..410e14e 100644 --- a/src/adc_trigger.rs +++ b/src/adc_trigger.rs @@ -1,27 +1,81 @@ +#[cfg(feature = "hrtim_v2")] +use crate::pac; use core::marker::PhantomData; -#[cfg(feature = "stm32g4")] -pub trait Adc13Trigger { +/// Handle to timers reset/roll-over event +pub struct TimerReset(pub(crate) PhantomData); + +/// Handle to timers period event +pub struct TimerPeriod(pub(crate) PhantomData); + +#[cfg(feature = "hrtim_v2")] +macro_rules! impl_adc1234_trigger { + ($($t:ident: [$trait_:ident, $adcXr:ident]),*) => {$( + #[non_exhaustive] + pub struct $t; + + impl $t { + pub fn enable_source(&mut self, _trigger: &T) { + let common = unsafe { &*pac::HRTIM_COMMON::ptr() }; + unsafe { + common.$adcXr().modify(|r, w| w.bits(r.bits() | T::BITS)); + } + } + } + )*} +} + +#[cfg(feature = "hrtim_v2")] +macro_rules! impl_adc5678910_trigger { + ($($t:ident: [$trait_:ident, $adcXtrg:ident]),*) => {$( + #[non_exhaustive] + pub struct $t; + + impl $t { + pub fn enable_source(&mut self, _trigger: &T) { + let common = unsafe { &*pac::HRTIM_COMMON::ptr() }; + common + .adcer() + .modify(|_r, w| unsafe { w.$adcXtrg().bits(T::BITS as u8) }); + } + } + )*} +} + +#[cfg(feature = "hrtim_v2")] +pub trait AdcTrigger13 { const BITS: u32; } -#[cfg(feature = "stm32g4")] -pub trait Adc24Trigger { +#[cfg(feature = "hrtim_v2")] +pub trait AdcTrigger24 { const BITS: u32; } -#[cfg(feature = "stm32g4")] -pub trait Adc579Trigger { +#[cfg(feature = "hrtim_v2")] +pub trait AdcTrigger579 { const BITS: u32; } -#[cfg(feature = "stm32g4")] -pub trait Adc6810Trigger { +#[cfg(feature = "hrtim_v2")] +pub trait AdcTrigger6810 { const BITS: u32; } -/// Handle to timers reset/roll-over event -pub struct TimerReset(pub(crate) PhantomData); +#[cfg(feature = "hrtim_v2")] +impl_adc1234_trigger! { + AdcTrigger1: [AdcTrigger13, adc1r], + AdcTrigger2: [AdcTrigger24, adc2r], + AdcTrigger3: [AdcTrigger13, adc3r], + AdcTrigger4: [AdcTrigger24, adc4r] +} -/// Handle to timers period event -pub struct TimerPeriod(pub(crate) PhantomData); +#[cfg(feature = "hrtim_v2")] +impl_adc5678910_trigger! { + AdcTrigger5: [AdcTrigger579, adc5trg], + AdcTrigger6: [AdcTrigger6810, adc6trg], + AdcTrigger7: [AdcTrigger579, adc7trg], + AdcTrigger8: [AdcTrigger6810, adc8trg], + AdcTrigger9: [AdcTrigger579, adc9trg], + AdcTrigger10: [AdcTrigger6810, adc10trg] +} diff --git a/src/capture.rs b/src/capture.rs index 7936295..1e8e469 100644 --- a/src/capture.rs +++ b/src/capture.rs @@ -1,16 +1,9 @@ -use crate::stm32; - use super::timer; -#[cfg(feature = "stm32g4")] -use crate::hal::dma::PeripheralToMemory; -#[cfg(feature = "stm32g4")] -use crate::mcu::DmaMuxResources; - -use core::marker::PhantomData; #[cfg(feature = "hrtim_v2")] -use stm32::HRTIM_TIMF; -use stm32::{HRTIM_TIMA, HRTIM_TIMB, HRTIM_TIMC, HRTIM_TIMD, HRTIM_TIME}; +use crate::pac::HRTIM_TIMF; +use crate::pac::{HRTIM_TIMA, HRTIM_TIMB, HRTIM_TIMC, HRTIM_TIMD, HRTIM_TIME}; +use core::marker::PhantomData; pub struct Ch1; pub struct Ch2; @@ -258,19 +251,6 @@ macro_rules! impl_capture { tim.isr().read().$cptX().bit() } } - - #[cfg(feature = "stm32g4")] - unsafe impl crate::hal::dma::traits::TargetAddress for HrCapt<$TIMX, PSCL, $CH, Dma> { - #[inline(always)] - fn address(&self) -> u32 { - let tim = unsafe { &*$TIMX::ptr() }; - &tim.$cptXr() as *const _ as u32 - } - - type MemSize = u32; - - const REQUEST_LINE: Option = Some(DmaMuxResources::$TIMX as u8); - } }; } diff --git a/src/compare_register.rs b/src/compare_register.rs index c49f8a0..da938e1 100644 --- a/src/compare_register.rs +++ b/src/compare_register.rs @@ -1,8 +1,8 @@ use core::marker::PhantomData; #[cfg(feature = "hrtim_v2")] -use crate::stm32::HRTIM_TIMF; -use crate::stm32::{HRTIM_MASTER, HRTIM_TIMA, HRTIM_TIMB, HRTIM_TIMC, HRTIM_TIMD, HRTIM_TIME}; +use crate::pac::HRTIM_TIMF; +use crate::pac::{HRTIM_MASTER, HRTIM_TIMA, HRTIM_TIMB, HRTIM_TIMC, HRTIM_TIMD, HRTIM_TIME}; pub trait HrCompareRegister { fn get_duty(&self) -> u16; @@ -15,13 +15,10 @@ pub struct HrCr3(PhantomData<(TIM, PSCL)>); pub struct HrCr4(PhantomData<(TIM, PSCL)>); #[cfg(feature = "stm32g4")] -use super::adc_trigger::Adc13Trigger as Adc13; -#[cfg(feature = "stm32g4")] -use super::adc_trigger::Adc24Trigger as Adc24; -#[cfg(feature = "stm32g4")] -use super::adc_trigger::Adc579Trigger as Adc579; -#[cfg(feature = "stm32g4")] -use super::adc_trigger::Adc6810Trigger as Adc6810; +use super::adc_trigger::{ + AdcTrigger13 as Adc13, AdcTrigger24 as Adc24, AdcTrigger579 as Adc579, + AdcTrigger6810 as Adc6810, +}; macro_rules! hrtim_cr_helper { (HRTIM_MASTER: $cr_type:ident: diff --git a/src/control.rs b/src/control.rs index d5cc594..d33011a 100644 --- a/src/control.rs +++ b/src/control.rs @@ -1,81 +1,26 @@ #[cfg(feature = "hrtim_v2")] +use crate::adc_trigger; +#[cfg(feature = "hrtim_v2")] use crate::fault::FltMonitor6; use crate::fault::{ FltMonitor1, FltMonitor2, FltMonitor3, FltMonitor4, FltMonitor5, FltMonitorSys, }; -use crate::{hal, stm32}; - -#[cfg(feature = "stm32h7")] -use hal::rcc::ResetEnable as _; - -#[cfg(not(feature = "stm32h7"))] -use hal::rcc::{Enable, Reset}; - -use stm32::HRTIM_COMMON; +use crate::pac::HRTIM_COMMON; use super::{external_event::EevInputs, fault::FaultInputs}; -pub trait HrControltExt { - fn hr_control( - self, - #[cfg(feature = "stm32f3")] _clocks: &hal::rcc::Clocks, - #[cfg(feature = "stm32f3")] apb2: &mut hal::rcc::APB2, - - #[allow(unused_variables)] - #[cfg(feature = "stm32g4")] - rcc: &mut hal::rcc::Rcc, - - #[cfg(feature = "stm32h7")] _clocks: &hal::rcc::CoreClocks, - #[cfg(feature = "stm32h7")] rcc: hal::rcc::rec::Hrtim, - ) -> HrTimOngoingCalibration; -} - -impl HrControltExt for HRTIM_COMMON { - fn hr_control( - self, - #[cfg(feature = "stm32f3")] _clocks: &hal::rcc::Clocks, - #[cfg(feature = "stm32f3")] apb2: &mut hal::rcc::APB2, - +impl HrTimOngoingCalibration { + /// Look in the hal for an corresponding extension trait for `HRTIM_COMMON`. + /// + /// ..unless you are the one implementing the hal + /// + /// # Safety + /// The user is expected to have setup and enabled rcc clock to the peripheral + pub unsafe fn hr_control() -> HrTimOngoingCalibration { #[allow(unused_variables)] - #[cfg(feature = "stm32g4")] - rcc: &mut hal::rcc::Rcc, - - #[cfg(feature = "stm32h7")] _clocks: &hal::rcc::CoreClocks, - #[cfg(feature = "stm32h7")] rcc: hal::rcc::rec::Hrtim, - ) -> HrTimOngoingCalibration { let common = unsafe { &*HRTIM_COMMON::ptr() }; - let rcc = { - #[cfg(feature = "stm32g4")] - unsafe { - &*stm32::RCC::ptr() - } - - #[cfg(feature = "stm32f3")] - { - apb2 - } - - #[cfg(feature = "stm32h7")] - { - { - let rcc = unsafe { &*hal::stm32::RCC::ptr() }; - // Same clock source as CPU - rcc.cfgr().modify(|_, w| w.hrtimsel().c_ck()); - } - rcc - } - }; - - #[cfg(not(feature = "stm32h7"))] - ::enable(rcc); - #[cfg(not(feature = "stm32h7"))] - ::reset(rcc); - - #[cfg(feature = "stm32h7")] - rcc.enable().reset(); - // Start calibration procedure #[cfg(not(feature = "stm32h7"))] common @@ -288,25 +233,25 @@ impl HrTimCalibrated { fault_6: FltMonitor6, #[cfg(feature = "stm32g4")] - adc_trigger1: Adc1Trigger, + adc_trigger1: adc_trigger::AdcTrigger1, #[cfg(feature = "stm32g4")] - adc_trigger2: Adc2Trigger, + adc_trigger2: adc_trigger::AdcTrigger2, #[cfg(feature = "stm32g4")] - adc_trigger3: Adc3Trigger, + adc_trigger3: adc_trigger::AdcTrigger3, #[cfg(feature = "stm32g4")] - adc_trigger4: Adc4Trigger, + adc_trigger4: adc_trigger::AdcTrigger4, #[cfg(feature = "stm32g4")] - adc_trigger5: Adc5Trigger, + adc_trigger5: adc_trigger::AdcTrigger5, #[cfg(feature = "stm32g4")] - adc_trigger6: Adc6Trigger, + adc_trigger6: adc_trigger::AdcTrigger6, #[cfg(feature = "stm32g4")] - adc_trigger7: Adc7Trigger, + adc_trigger7: adc_trigger::AdcTrigger7, #[cfg(feature = "stm32g4")] - adc_trigger8: Adc8Trigger, + adc_trigger8: adc_trigger::AdcTrigger8, #[cfg(feature = "stm32g4")] - adc_trigger9: Adc9Trigger, + adc_trigger9: adc_trigger::AdcTrigger9, #[cfg(feature = "stm32g4")] - adc_trigger10: Adc10Trigger, + adc_trigger10: adc_trigger::AdcTrigger10, } } } @@ -338,107 +283,28 @@ pub struct HrPwmControl { pub fault_6: FltMonitor6, #[cfg(feature = "stm32g4")] - pub adc_trigger1: Adc1Trigger, + pub adc_trigger1: adc_trigger::AdcTrigger1, #[cfg(feature = "stm32g4")] - pub adc_trigger2: Adc2Trigger, + pub adc_trigger2: adc_trigger::AdcTrigger2, #[cfg(feature = "stm32g4")] - pub adc_trigger3: Adc3Trigger, + pub adc_trigger3: adc_trigger::AdcTrigger3, #[cfg(feature = "stm32g4")] - pub adc_trigger4: Adc4Trigger, + pub adc_trigger4: adc_trigger::AdcTrigger4, #[cfg(feature = "stm32g4")] - pub adc_trigger5: Adc5Trigger, + pub adc_trigger5: adc_trigger::AdcTrigger5, #[cfg(feature = "stm32g4")] - pub adc_trigger6: Adc6Trigger, + pub adc_trigger6: adc_trigger::AdcTrigger6, #[cfg(feature = "stm32g4")] - pub adc_trigger7: Adc7Trigger, + pub adc_trigger7: adc_trigger::AdcTrigger7, #[cfg(feature = "stm32g4")] - pub adc_trigger8: Adc8Trigger, + pub adc_trigger8: adc_trigger::AdcTrigger8, #[cfg(feature = "stm32g4")] - pub adc_trigger9: Adc9Trigger, + pub adc_trigger9: adc_trigger::AdcTrigger9, #[cfg(feature = "stm32g4")] - pub adc_trigger10: Adc10Trigger, + pub adc_trigger10: adc_trigger::AdcTrigger10, } -#[cfg(feature = "stm32g4")] -macro_rules! impl_adc1234_trigger { - ($($t:ident: [$trait_:ident, $adcXr:ident, $variant345:ident $(, $variant12:ident)*]),*) => {$( - #[non_exhaustive] - pub struct $t; - - impl $t { - pub fn enable_source(&mut self, _trigger: &T) { - let common = unsafe { &*HRTIM_COMMON::ptr() }; - unsafe { - common.$adcXr().modify(|r, w| w.bits(r.bits() | T::BITS)); - } - } - } - - $(impl From<&$t> for hal::adc::config::ExternalTrigger12 { - fn from(_val: &$t) -> Self { - hal::adc::config::ExternalTrigger12::$variant12 - } - })* - - impl From<&$t> for hal::adc::config::ExternalTrigger345 { - fn from(_val: &$t) -> Self { - hal::adc::config::ExternalTrigger345::$variant345 - } - } - )*} -} - -#[cfg(feature = "stm32g4")] -macro_rules! impl_adc5678910_trigger { - ($($t:ident: [$trait_:ident, $adcXtrg:ident, $variant345:ident, $variant12:ident]),*) => {$( - #[non_exhaustive] - pub struct $t; - - impl $t { - pub fn enable_source(&mut self, _trigger: &T) { - let common = unsafe { &*HRTIM_COMMON::ptr() }; - common - .adcer() - .modify(|_r, w| unsafe { w.$adcXtrg().bits(T::BITS as u8) }); - } - } - - impl From<&$t> for hal::adc::config::ExternalTrigger12 { - fn from(_val: &$t) -> Self { - hal::adc::config::ExternalTrigger12::$variant12 - } - } - - impl From<&$t> for hal::adc::config::ExternalTrigger345 { - fn from(_val: &$t) -> Self { - hal::adc::config::ExternalTrigger345::$variant345 - } - } - - )*} -} -#[cfg(feature = "stm32g4")] -impl_adc1234_trigger! {// reg adc345, adc12 - Adc1Trigger: [Adc13Trigger, adc1r, Hrtim_adc_trg_1, Hrtim_adc_trg_1], - Adc2Trigger: [Adc24Trigger, adc2r, Hrtim_adc_trg_2], - Adc3Trigger: [Adc13Trigger, adc3r, Hrtim_adc_trg_3, Hrtim_adc_trg_3], - Adc4Trigger: [Adc24Trigger, adc4r, Hrtim_adc_trg_4] -} - -#[cfg(feature = "stm32g4")] -impl_adc5678910_trigger! { - Adc5Trigger: [Adc579Trigger, adc5trg, Hrtim_adc_trg_5, Hrtim_adc_trg_5], - Adc6Trigger: [Adc6810Trigger, adc6trg, Hrtim_adc_trg_6, Hrtim_adc_trg_6], - Adc7Trigger: [Adc579Trigger, adc7trg, Hrtim_adc_trg_7, Hrtim_adc_trg_7], - Adc8Trigger: [Adc6810Trigger, adc8trg, Hrtim_adc_trg_8, Hrtim_adc_trg_8], - Adc9Trigger: [Adc579Trigger, adc9trg, Hrtim_adc_trg_9, Hrtim_adc_trg_9], - Adc10Trigger: [Adc6810Trigger, adc10trg, Hrtim_adc_trg_10, Hrtim_adc_trg_10] -} - -#[cfg(feature = "stm32g4")] -use super::adc_trigger::{Adc13Trigger, Adc24Trigger, Adc579Trigger, Adc6810Trigger}; - #[cfg(feature = "stm32g4")] pub enum AdcTriggerPostscaler { None = 0, diff --git a/src/external_event.rs b/src/external_event.rs index f344010..da63f52 100644 --- a/src/external_event.rs +++ b/src/external_event.rs @@ -1,15 +1,5 @@ -use crate::stm32; - -#[cfg(feature = "stm32g4")] -use crate::hal::comparator::{COMP1, COMP2, COMP3, COMP4, COMP5, COMP6, COMP7}; -#[cfg(feature = "stm32g4")] -use crate::hal::gpio::gpiob::{PB3, PB4, PB5, PB6, PB7, PB8, PB9}; -#[cfg(feature = "stm32g4")] -use crate::hal::gpio::gpioc::{PC11, PC12, PC5, PC6}; -#[cfg(feature = "stm32g4")] -use crate::hal::gpio::{self, AF13, AF3}; +use crate::pac::HRTIM_COMMON; use crate::Polarity; -use stm32::HRTIM_COMMON; use super::control::HrTimCalibrated; @@ -58,55 +48,6 @@ pub unsafe trait EevSrcBits: Sized { fn cfg(self) {} } -#[cfg(feature = "stm32g4")] -macro_rules! impl_eev_input { - ($($N:literal: COMP=[$compX:ident $(, ($compY:ident, $compY_src_bits:literal))*], PINS=[$(($pin:ident, $af:ident)),*])*) => {$( - $(unsafe impl EevSrcBits<$N> for $pin>{ - const SRC_BITS: u8 = 0b00; - fn cfg(self) { - self.into_alternate::<$af>(); - } - })* - - unsafe impl EevSrcBits<$N> for &crate::hal::comparator::Comparator<$compX, ED> - where ED: crate::hal::comparator::EnabledState - { - const SRC_BITS: u8 = 0b01; - } - - $( - unsafe impl EevSrcBits<$N> for &crate::hal::comparator::Comparator<$compY, ED> - where ED: crate::hal::comparator::EnabledState - { - const SRC_BITS: u8 = $compY_src_bits; - } - )* - - impl EevInput<$N> { - pub fn bind(self, src: SRC) -> SourceBuilder<$N, IS_FAST> - where SRC: EevSrcBits<$N> - { - src.cfg(); - unsafe { SourceBuilder::new(SRC::SRC_BITS) } - } - } - )*}; -} - -#[cfg(feature = "stm32g4")] -impl_eev_input! { - 1: COMP = [COMP2], PINS = [(PC12, AF3)] - 2: COMP = [COMP4], PINS = [(PC11, AF3)] - 3: COMP = [COMP6], PINS = [(PB7, AF13)] - 4: COMP = [COMP1, (COMP5, 0b10)], PINS = [(PB6, AF13)] - 5: COMP = [COMP3, (COMP7, 0b10)], PINS = [(PB9, AF13)] - 6: COMP = [COMP2, (COMP1, 0b10)], PINS = [(PB5, AF13)] - 7: COMP = [COMP4], PINS = [(PB4, AF13)] - 8: COMP = [COMP6, (COMP3, 0b10)], PINS = [(PB8, AF13)] - 9: COMP = [COMP5, (COMP4, 0b11)], PINS = [(PB3, AF13)] - 10: COMP = [COMP7], PINS = [(PC5, AF13), (PC6, AF3)] -} - #[derive()] pub enum EdgeOrPolarity { Edge(Edge), @@ -197,7 +138,10 @@ pub struct SourceBuilder { #[cfg(feature = "stm32g4")] impl SourceBuilder { - unsafe fn new(src_bits: u8) -> Self { + /// # Safety + /// Caller needs to ensure that src_bits is a valid bit pattern + /// for eeXsrc bits in eecr1/2 registers for the intended input + pub unsafe fn new(src_bits: u8) -> Self { Self { src_bits, edge_or_polarity_bits: 0, // Level sensitive diff --git a/src/fault.rs b/src/fault.rs index 6cd2cef..32abc24 100644 --- a/src/fault.rs +++ b/src/fault.rs @@ -1,18 +1,6 @@ -#[cfg(feature = "stm32g4")] +#[cfg(feature = "hrtim_v2")] use crate::control::HrPwmControl; -use crate::stm32; - -#[cfg(feature = "stm32g4")] -use crate::hal::comparator::{COMP1, COMP2, COMP3, COMP4, COMP5, COMP6}; -#[cfg(feature = "stm32g4")] -use crate::hal::gpio::{ - self, - gpioa::{PA12, PA15}, - gpiob::{PB0, PB10, PB11}, - gpioc::{PC10, PC7}, - AF13, AF3, -}; -use stm32::HRTIM_COMMON; +use crate::pac::HRTIM_COMMON; use super::control::HrPwmCtrl; @@ -64,7 +52,10 @@ pub struct SourceBuilder { #[cfg(feature = "stm32g4")] impl SourceBuilder { - unsafe fn new(input: I, src_bits: u8) -> Self { + /// # Safety + /// Caller needs to ensure that src_bits is a valid bit pattern + /// for fltXsrc bits in fltinr1/2 registers for the intended input + pub unsafe fn new(input: I, src_bits: u8) -> Self { SourceBuilder { _input: input, src_bits, @@ -74,15 +65,13 @@ impl SourceBuilder { } } -#[cfg(feature = "stm32g4")] +#[cfg(feature = "hrtim_v2")] macro_rules! impl_faults { ($( $input:ident => $source:ident: - PINS=[($pin:ident, $af:ident) $(,($pin_b:ident, $af_b:ident))*], - COMP=$compX:ident, $enable_bits:literal, + $enable_bits:literal, $fltinrZ:ident, $fltWsrc_0:ident, $fltWsrc_1:ident, $fltWp:ident, $fltWf:ident, $fltWe:ident, $fltWlck:ident, )+) => {$( - // This should NOT be Copy/Clone #[non_exhaustive] pub struct $input; @@ -91,30 +80,6 @@ macro_rules! impl_faults { #[derive(Copy, Clone)] pub struct $source; - impl $input { - pub fn bind_pin(self, pin: $pin>) -> SourceBuilder<$input> { - pin.into_alternate::<$af>(); - unsafe { SourceBuilder::new(self, 0b00) } - } - - $( - // TODO: Is there a nicer way to do this? - pub fn bind_pin_b(self, pin: $pin_b>) -> SourceBuilder<$input> { - pin.into_alternate::<$af_b>(); - unsafe { SourceBuilder::new(self, 0b00) } - } - )* - - #[cfg(feature = "stm32g4")] - pub fn bind_comp(self, _comp: &crate::hal::comparator::Comparator<$compX, crate::hal::comparator::Enabled>) -> SourceBuilder<$input> { - unsafe { SourceBuilder::new(self, 0b01) } - } - - /*pub fn bind_external(?) { - SourceBuilder::new(self, 0b10); - }*/ - } - impl SourceBuilder<$input> { pub fn finalize(self, _control: &mut HrPwmControl) -> $source { let SourceBuilder{ _input, src_bits, is_active_high, filter_bits } = self; @@ -158,45 +123,45 @@ macro_rules! impl_faults { )+} } -#[cfg(feature = "stm32g4")] +#[cfg(feature = "hrtim_v2")] impl_faults!( - FaultInput1 => FaultSource1: PINS=[(PA12, AF13)], COMP=COMP2, 0b000001, fltinr1, flt1src, flt1src_1, flt1p, flt1f, flt1e, flt1lck, - FaultInput2 => FaultSource2: PINS=[(PA15, AF13)], COMP=COMP4, 0b000010, fltinr1, flt2src, flt2src_1, flt2p, flt2f, flt2e, flt2lck, - FaultInput3 => FaultSource3: PINS=[(PB10, AF13)], COMP=COMP6, 0b000100, fltinr1, flt3src, flt3src_1, flt3p, flt3f, flt3e, flt3lck, - FaultInput4 => FaultSource4: PINS=[(PB11, AF13)], COMP=COMP1, 0b001000, fltinr1, flt4src, flt4src_1, flt4p, flt4f, flt4e, flt4lck, - FaultInput5 => FaultSource5: PINS=[(PB0, AF13), (PC7, AF3)], COMP=COMP3, 0b010000, fltinr2, flt5src, flt5src_1, flt5p, flt5f, flt5e, flt5lck, - FaultInput6 => FaultSource6: PINS=[(PC10, AF13)], COMP=COMP5, 0b100000, fltinr2, flt6src, flt6src_1, flt6p, flt6f, flt6e, flt6lck, + FaultInput1 => FaultSource1: 0b000001, fltinr1, flt1src, flt1src_1, flt1p, flt1f, flt1e, flt1lck, + FaultInput2 => FaultSource2: 0b000010, fltinr1, flt2src, flt2src_1, flt2p, flt2f, flt2e, flt2lck, + FaultInput3 => FaultSource3: 0b000100, fltinr1, flt3src, flt3src_1, flt3p, flt3f, flt3e, flt3lck, + FaultInput4 => FaultSource4: 0b001000, fltinr1, flt4src, flt4src_1, flt4p, flt4f, flt4e, flt4lck, + FaultInput5 => FaultSource5: 0b010000, fltinr2, flt5src, flt5src_1, flt5p, flt5f, flt5e, flt5lck, + FaultInput6 => FaultSource6: 0b100000, fltinr2, flt6src, flt6src_1, flt6p, flt6f, flt6e, flt6lck, ); pub struct FaultInputs { - #[cfg(feature = "stm32g4")] + #[cfg(feature = "hrtim_v2")] pub fault_input1: FaultInput1, - #[cfg(feature = "stm32g4")] + #[cfg(feature = "hrtim_v2")] pub fault_input2: FaultInput2, - #[cfg(feature = "stm32g4")] + #[cfg(feature = "hrtim_v2")] pub fault_input3: FaultInput3, - #[cfg(feature = "stm32g4")] + #[cfg(feature = "hrtim_v2")] pub fault_input4: FaultInput4, - #[cfg(feature = "stm32g4")] + #[cfg(feature = "hrtim_v2")] pub fault_input5: FaultInput5, - #[cfg(feature = "stm32g4")] + #[cfg(feature = "hrtim_v2")] pub fault_input6: FaultInput6, } impl FaultInputs { pub(crate) unsafe fn new() -> Self { FaultInputs { - #[cfg(feature = "stm32g4")] + #[cfg(feature = "hrtim_v2")] fault_input1: FaultInput1, - #[cfg(feature = "stm32g4")] + #[cfg(feature = "hrtim_v2")] fault_input2: FaultInput2, - #[cfg(feature = "stm32g4")] + #[cfg(feature = "hrtim_v2")] fault_input3: FaultInput3, - #[cfg(feature = "stm32g4")] + #[cfg(feature = "hrtim_v2")] fault_input4: FaultInput4, - #[cfg(feature = "stm32g4")] + #[cfg(feature = "hrtim_v2")] fault_input5: FaultInput5, - #[cfg(feature = "stm32g4")] + #[cfg(feature = "hrtim_v2")] fault_input6: FaultInput6, } } diff --git a/src/lib.rs b/src/lib.rs index e371a42..31d92ac 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -1,5 +1,35 @@ #![no_std] +#[cfg(not(any( + feature = "stm32f334", + feature = "stm32h742", + feature = "stm32h743", + //feature = "stm32h745", + feature = "stm32h747cm7", + feature = "stm32h750", + feature = "stm32h753", + //feature = "stm32h755", + //feature = "stm32h757", + feature = "stm32g474", + feature = "stm32g484", +)))] +compile_error!( + "This crate requires one of the following features enabled: + stm32f334 + + stm32h742 + stm32h743 + #stm32h745 + stm32h747cm7 + stm32h750 + stm32h753 + #stm32h755 + #stm32h757 + + stm32g474 + stm32g484" +); + pub mod adc_trigger; pub mod capture; pub mod compare_register; @@ -12,31 +42,48 @@ pub mod output; pub mod timer; pub mod timer_eev_cfg; -#[cfg(feature = "stm32f3")] -#[path = "stm32f3.rs"] -mod mcu; +#[cfg(feature = "stm32f334")] +pub use stm32f3::stm32f3x4 as pac; -#[cfg(feature = "stm32h7")] -#[path = "stm32h7.rs"] -mod mcu; +#[cfg(feature = "stm32h742")] +pub use stm32h7::stm32h742 as pac; + +#[cfg(feature = "stm32h743")] +pub use stm32h7::stm32h743 as pac; + +//#[cfg(feature = "stm32h745")] +//pub use stm32h7::stm32h745 as pac; + +#[cfg(feature = "stm32h747cm7")] +pub use stm32h7::stm32h747cm7 as pac; + +#[cfg(feature = "stm32h750")] +pub use stm32h7::stm32h750 as pac; + +#[cfg(feature = "stm32h753")] +pub use stm32h7::stm32h753 as pac; + +//#[cfg(feature = "stm32h755")] +//pub use stm32h7::stm32h755 as pac; + +//#[cfg(feature = "stm32h757")] +//pub use stm32h7::stm32h757 as pac; -#[cfg(feature = "stm32g4")] -#[path = "stm32g4.rs"] -mod mcu; +#[cfg(feature = "stm32g474")] +pub use stm32g4::stm32g474 as pac; -pub use mcu::{hal, stm32, Polarity}; +#[cfg(feature = "stm32g484")] +pub use stm32g4::stm32g484 as pac; use core::marker::PhantomData; use core::mem::MaybeUninit; use crate::compare_register::{HrCr1, HrCr2, HrCr3, HrCr4}; use crate::fault::{FaultAction, FaultSource}; -#[cfg(feature = "hrtim_v2")] -use crate::stm32::HRTIM_TIMF; -use crate::stm32::{ - HRTIM_COMMON, HRTIM_MASTER, HRTIM_TIMA, HRTIM_TIMB, HRTIM_TIMC, HRTIM_TIMD, HRTIM_TIME, -}; use crate::timer::HrTim; +#[cfg(feature = "hrtim_v2")] +use pac::HRTIM_TIMF; +use pac::{HRTIM_COMMON, HRTIM_MASTER, HRTIM_TIMA, HRTIM_TIMB, HRTIM_TIMC, HRTIM_TIMD, HRTIM_TIME}; use capture::{HrCaptCh1, HrCaptCh2}; @@ -45,11 +92,10 @@ use self::control::HrPwmControl; use self::deadtime::DeadtimeConfig; use self::output::ToHrOut; use self::timer_eev_cfg::EevCfgs; -use fugit::HertzU32 as Hertz; /// Internal enum that keeps track of the count settings before PWM is finalized enum CountSettings { - Frequency(Hertz), + //Frequency(Hertz), Period(u16), } @@ -117,17 +163,6 @@ pub enum HrCountingDirection { UpDown, } -// Needed to calculate frequency -impl From for crate::mcu::Alignment { - fn from(val: HrCountingDirection) -> Self { - match val { - HrCountingDirection::Up => crate::mcu::Alignment::Left, - #[cfg(feature = "hrtim_v2")] - HrCountingDirection::UpDown => crate::mcu::Alignment::Center, - } - } -} - #[derive(Copy, Clone, PartialEq, Debug)] pub enum InterleavedMode { Disabled, @@ -181,11 +216,17 @@ pub trait HrPwmAdvExt: Sized { PINS: ToHrOut; } +#[derive(Debug, Clone, Copy, PartialEq)] +pub enum Polarity { + ActiveHigh, + ActiveLow, +} + /// HrPwmBuilder is used to configure advanced HrTim PWM features pub struct HrPwmBuilder { _tim: PhantomData, _prescaler: PhantomData, - pins: PINS, + pub pins: PINS, timer_mode: HrTimerMode, counting_direction: HrCountingDirection, //base_freq: HertzU64, @@ -233,13 +274,10 @@ pub enum MasterPreloadSource { } macro_rules! hrtim_finalize_body { - ($this:expr, $PreloadSource:ident, $TIMX:ident, [$($out:ident)*], $($moder:ident, $otyper:ident, $afr:ident)*) => {{ + ($this:expr, $PreloadSource:ident, $TIMX:ident, [$($out:ident)*]) => {{ let tim = unsafe { &*$TIMX::ptr() }; let (period, prescaler_bits) = match $this.count { CountSettings::Period(period) => (period as u32, PSCL::BITS as u16), - CountSettings::Frequency(_freq) => { - todo!()//>::calculate_frequency($this.base_freq, freq, $this.counting_direction.into()) - }, }; let (half, _intlvd) = match $this.interleaved_mode { @@ -389,13 +427,6 @@ macro_rules! hrtim_finalize_body { // Start timer //let master = unsafe { &*HRTIM_MASTER::ptr() }; //master.mcr.modify(|_r, w| { w.$tXcen().set_bit() }); - - // Connect pins and let HRTIM take over control over them - $this.pins.connect_to_hrtim($($moder, $otyper, $afr)*); - - unsafe { - MaybeUninit::uninit().assume_init() - } }}; (PreloadSource, $this:expr, $tim:expr) => {{ @@ -437,14 +468,6 @@ macro_rules! hrtim_finalize_body { macro_rules! hrtim_common_methods { ($TIMX:ident, $PS:ident) => { - /// Set the PWM frequency; will overwrite the previous prescaler and period - /// The requested frequency will be rounded to the nearest achievable frequency; the actual frequency may be higher or lower than requested. - pub fn frequency>(mut self, freq: T) -> Self { - self.count = CountSettings::Frequency(freq.into()); - - self - } - /// Set the prescaler; PWM count runs at base_frequency/(prescaler+1) pub fn prescaler

(self, _prescaler: P) -> HrPwmBuilder<$TIMX, P, $PS, PINS> where @@ -473,7 +496,6 @@ macro_rules! hrtim_common_methods { } = self; let period = match count { - CountSettings::Frequency(_) => u16::MAX, CountSettings::Period(period) => period, }; @@ -587,24 +609,12 @@ macro_rules! hrtim_hal { PSCL: HrtimPrescaler, PINS: ToHrOut<$TIMX>, { - pub fn finalize(self, _control: &mut HrPwmControl, - #[cfg(feature = "stm32f3")] - moder: &mut ::MODER, - #[cfg(feature = "stm32f3")] - otyper: &mut ::OTYPER, - #[cfg(feature = "stm32f3")] - afr: &mut PINS::Afr - ) -> HrParts<$TIMX, PSCL, PINS::Out> { - #[cfg(feature = "stm32f3")] { - hrtim_finalize_body!( - self, PreloadSource, - $TIMX, [$($out)*], moder, otyper, afr - ) - } - - #[cfg(not(feature = "stm32f3"))] { - hrtim_finalize_body!(self, PreloadSource, $TIMX, [$($out)*],) - } + // For HAL writers: + // Make sure to connect gpios after calling this function and then it should be safe to + // conjure an instance of HrParts<$TIMX, PSCL, PINS::Out> + pub fn _init(self, _control: &mut HrPwmControl) -> PINS { + hrtim_finalize_body!(self, PreloadSource, $TIMX, [$($out)*]); + self.pins } hrtim_common_methods!($TIMX, PreloadSource); @@ -739,32 +749,10 @@ where PSCL: HrtimPrescaler, PINS: ToHrOut, { - pub fn finalize( - self, - _control: &mut HrPwmControl, - #[cfg(feature = "stm32f3")] - moder: &mut ::MODER, - #[cfg(feature = "stm32f3")] - otyper: &mut ::OTYPER, - #[cfg(feature = "stm32f3")] afr: &mut PINS::Afr, - ) -> HrParts { - #[cfg(feature = "stm32f3")] - { - hrtim_finalize_body!( - self, - MasterPreloadSource, - HRTIM_MASTER, - [], - moder, - otyper, - afr - ) - } + pub fn finalize(self, _control: &mut HrPwmControl) -> HrParts { + hrtim_finalize_body!(self, MasterPreloadSource, HRTIM_MASTER, []); - #[cfg(not(feature = "stm32f3"))] - { - hrtim_finalize_body!(self, MasterPreloadSource, HRTIM_MASTER, [],) - } + unsafe { MaybeUninit::uninit().assume_init() } } hrtim_common_methods!(HRTIM_MASTER, MasterPreloadSource); diff --git a/src/output.rs b/src/output.rs index 05af02a..f6f999e 100644 --- a/src/output.rs +++ b/src/output.rs @@ -1,39 +1,10 @@ #[cfg(feature = "hrtim_v2")] -use crate::stm32::HRTIM_TIMF; -use crate::{ - hal, - mcu::GpioInputMode, - stm32::{HRTIM_COMMON, HRTIM_TIMA, HRTIM_TIMB, HRTIM_TIMC, HRTIM_TIMD, HRTIM_TIME}, -}; +use crate::pac::HRTIM_TIMF; +use crate::pac::{HRTIM_COMMON, HRTIM_TIMA, HRTIM_TIMB, HRTIM_TIMC, HRTIM_TIMD, HRTIM_TIME}; use core::marker::PhantomData; use super::event::EventSource; -use hal::gpio::{ - gpioa::{PA10, PA11, PA8, PA9}, - gpioc::PC8, -}; - -#[cfg(any(feature = "stm32f3", feature = "stm32g4"))] -use hal::gpio::{ - gpiob::{PB12, PB13, PB14, PB15}, - gpioc::PC9, -}; - -#[cfg(feature = "stm32h7")] -use hal::gpio::{ - gpioa::PA12, - gpioc::{PC6, PC7}, - gpiog::{PG6, PG7}, -}; - -#[cfg(feature = "stm32g4")] -use hal::gpio::gpioc::{PC6, PC7}; - -mod sealed { - pub trait Sealed {} -} - macro_rules! hrtim_out { ($($TIMX:ident: $out_type:ident: $tXYoen:ident, $tXYodis:ident, $tXYods:ident, $setXYr:ident, $rstXYr:ident,)+) => {$( impl HrOutput<$TIMX, PSCL> for $out_type<$TIMX, PSCL> { @@ -159,156 +130,27 @@ impl State { } } -pub trait ToHrOut: sealed::Sealed { +/// # Safety +/// Caller needs to ensure that this is only implemented +/// for types that represent pin that can act as an output +/// for the specified timer `TIM` +pub unsafe trait ToHrOut { type Out; - - #[cfg(feature = "stm32f3")] - type GpioX: hal::gpio::marker::GpioStatic; - #[cfg(feature = "stm32f3")] - type Afr; - - fn connect_to_hrtim( - self, - #[cfg(feature = "stm32f3")] - moder: &mut ::MODER, - #[cfg(feature = "stm32f3")] - otyper: &mut ::OTYPER, - #[cfg(feature = "stm32f3")] afr: &mut Self::Afr, - ); } -impl sealed::Sealed for (PA, PB) +unsafe impl ToHrOut for (PA, PB) where PA: ToHrOut, PB: ToHrOut, -{ -} - -#[cfg(feature = "stm32f3")] -impl ToHrOut for (PA, PB) -where - PA: ToHrOut, - PB: ToHrOut, { type Out = (PA::Out, PB::Out); - type GpioX = PA::GpioX; - type Afr = PA::Afr; - - fn connect_to_hrtim( - self, - - moder: &mut ::MODER, - - otyper: &mut ::OTYPER, - - afr: &mut Self::Afr, - ) { - self.0.connect_to_hrtim(moder, otyper, afr); - self.1.connect_to_hrtim(moder, otyper, afr); - } -} - -#[cfg(any(feature = "stm32g4", feature = "stm32h7"))] -impl ToHrOut for (PA, PB) -where - PA: ToHrOut, - PB: ToHrOut, -{ - type Out = (PA::Out, PB::Out); - - fn connect_to_hrtim(self) { - self.0.connect_to_hrtim(); - self.1.connect_to_hrtim(); - } } pub struct HrOut1(PhantomData<(TIM, PSCL)>); pub struct HrOut2(PhantomData<(TIM, PSCL)>); -macro_rules! pins_helper { - ($TIMX:ty, $HrOutY:ident, $CHY:ident<$CHY_AF:literal>, $GpioX:ident) => { - impl sealed::Sealed<$TIMX> for $CHY {} - - impl ToHrOut<$TIMX> for $CHY { - type Out = $HrOutY<$TIMX, PSCL>; - - #[cfg(feature = "stm32f3")] - type GpioX = hal::gpio::$GpioX; - #[cfg(feature = "stm32f3")] - type Afr = >::AFR; - - // Pin> - fn connect_to_hrtim( - self, - #[cfg(feature = "stm32f3")] - moder: &mut ::MODER, - #[cfg(feature = "stm32f3")] - otyper: &mut ::OTYPER, - #[cfg(feature = "stm32f3")] afr: &mut Self::Afr, - ) { - #[allow(non_snake_case, unused_variables)] - let $GpioX = (); - - #[cfg(feature = "stm32f3")] - let _: $CHY> = - self.into_af_push_pull(moder, otyper, afr); - - #[cfg(any(feature = "stm32g4", feature = "stm32h7"))] - let _: $CHY> = self.into_alternate(); - } - } - }; -} - -// $GpioX is only used for f3x4 -macro_rules! pins { - ($($TIMX:ty: CH1: $CH1:ident<$CH1_AF:literal>, CH2: $CH2:ident<$CH2_AF:literal>, $GpioX:ident)+) => {$( - pins_helper!($TIMX, HrOut1, $CH1<$CH1_AF>, $GpioX); - pins_helper!($TIMX, HrOut2, $CH2<$CH2_AF>, $GpioX); - )+}; -} - -#[cfg(any(feature = "stm32g4", feature = "stm32f3"))] -pins! { - HRTIM_TIMA: CH1: PA8<13>, CH2: PA9<13>, Gpioa - HRTIM_TIMB: CH1: PA10<13>, CH2: PA11<13>, Gpioa - HRTIM_TIMC: CH1: PB12<13>, CH2: PB13<13>, Gpiob - HRTIM_TIMD: CH1: PB14<13>, CH2: PB15<13>, Gpiob - HRTIM_TIME: CH1: PC8<3>, CH2: PC9<3>, Gpioc -} - -#[cfg(feature = "stm32g4")] -pins! { - HRTIM_TIMF: CH1: PC6<13>, CH2: PC7<13>, Gpioc -} - -// TODO: H7 does not start in input mode, it starts in Analog -#[cfg(feature = "stm32h7")] // RM0433 -pins! { - HRTIM_TIMA: CH1: PC6<1>, CH2: PC7<1>, Gpioc - HRTIM_TIMB: CH1: PC8<1>, CH2: PA8<2>, GpioC // This type is not used for in this config so it's ok - HRTIM_TIMC: CH1: PA9<2>, CH2: PA10<2>, GpioA - HRTIM_TIMD: CH1: PA11<2>, CH2: PA12<2>, GpioA - HRTIM_TIME: CH1: PG6<2>, CH2: PG7<2>, GpioG -} - -impl sealed::Sealed for () {} -impl ToHrOut for () { +unsafe impl ToHrOut for () { type Out = (); - #[cfg(feature = "stm32f3")] - type GpioX = hal::gpio::Gpioa; - #[cfg(feature = "stm32f3")] - type Afr = (); - - fn connect_to_hrtim( - self, - #[cfg(feature = "stm32f3")] - _moder: &mut ::MODER, - #[cfg(feature = "stm32f3")] - _otyper: &mut ::OTYPER, - #[cfg(feature = "stm32f3")] _afr: &mut Self::Afr, - ) { - } } pub struct CH1(PhantomData); diff --git a/src/stm32f3.rs b/src/stm32f3.rs deleted file mode 100644 index 1ca5c39..0000000 --- a/src/stm32f3.rs +++ /dev/null @@ -1,17 +0,0 @@ -pub use stm32f3xx_hal as hal; -//pub use hal::pac as stm32; -pub use stm32f3::stm32f3x4 as stm32; - -#[allow(non_camel_case_types, dead_code)] -pub enum DmaMuxResources {} - -pub type GpioInputMode = hal::gpio::Input; - -pub enum Alignment { - Left, -} -#[cfg(feature = "stm32f3")] -pub enum Polarity { - ActiveHigh, - ActiveLow, -} diff --git a/src/stm32g4.rs b/src/stm32g4.rs deleted file mode 100644 index a42b791..0000000 --- a/src/stm32g4.rs +++ /dev/null @@ -1,20 +0,0 @@ -pub use hal::stm32; -pub use stm32g4xx_hal as hal; - -#[allow(non_camel_case_types, dead_code)] -pub enum DmaMuxResources { - HRTIM_MASTER = 95, - HRTIM_TIMA = 96, - HRTIM_TIMB = 97, - HRTIM_TIMC = 98, - HRTIM_TIMD = 99, - HRTIM_TIME = 100, - HRTIM_TIMF = 101, -} - -pub type GpioInputMode = hal::gpio::Input; - -pub use hal::pwm::Alignment; - -#[cfg(feature = "stm32g4")] -pub use hal::pwm::Polarity; diff --git a/src/stm32h7.rs b/src/stm32h7.rs deleted file mode 100644 index fd8c117..0000000 --- a/src/stm32h7.rs +++ /dev/null @@ -1,10 +0,0 @@ -pub use hal::stm32; -pub use stm32h7xx_hal as hal; - -// TODO: H7 does not start in input mode, it starts in Analog -pub type GpioInputMode = hal::gpio::Input; - -pub use hal::pwm::Alignment; - -#[cfg(feature = "stm32h7")] -pub use hal::pwm::Polarity; diff --git a/src/timer.rs b/src/timer.rs index d03ed0d..182b97c 100644 --- a/src/timer.rs +++ b/src/timer.rs @@ -1,6 +1,6 @@ #[cfg(feature = "hrtim_v2")] -use crate::stm32::HRTIM_TIMF; -use crate::stm32::{HRTIM_MASTER, HRTIM_TIMA, HRTIM_TIMB, HRTIM_TIMC, HRTIM_TIMD, HRTIM_TIME}; +use crate::pac::HRTIM_TIMF; +use crate::pac::{HRTIM_MASTER, HRTIM_TIMA, HRTIM_TIMB, HRTIM_TIMC, HRTIM_TIMD, HRTIM_TIME}; use core::marker::PhantomData; use super::{ @@ -315,13 +315,10 @@ macro_rules! hrtim_timer_adc_trigger { } #[cfg(feature = "stm32g4")] -use super::adc_trigger::Adc13Trigger as Adc13; -#[cfg(feature = "stm32g4")] -use super::adc_trigger::Adc24Trigger as Adc24; -#[cfg(feature = "stm32g4")] -use super::adc_trigger::Adc579Trigger as Adc579; -#[cfg(feature = "stm32g4")] -use super::adc_trigger::Adc6810Trigger as Adc6810; +use super::adc_trigger::{ + AdcTrigger13 as Adc13, AdcTrigger24 as Adc24, AdcTrigger579 as Adc579, + AdcTrigger6810 as Adc6810, +}; hrtim_timer! { HRTIM_MASTER: mcen, mudis,,