Adjust ARM and AltiVec variants of AEGIS

utelle · utelle · commit 51f8e0062fea · 2024-12-19T15:45:13.000+01:00
diff --git a/src/aegis/aegis128l/aegis128l_altivec.c b/src/aegis/aegis128l/aegis128l_altivec.c
@@ -22,7 +22,7 @@
 #ifdef __clang__
 #  pragma clang attribute push(__attribute__((target("altivec,crypto"))), apply_to = function)
 #elif defined(__GNUC__)
-#  pragma GCC target("+altivec+crypto")
+#  pragma GCC target("altivec,crypto")
 #endif
 
 #define AES_BLOCK_LENGTH 16
@@ -59,7 +59,7 @@ AEGIS_AES_BLOCK_LOAD(const uint8_t *a)
 static inline AEGIS_AES_BLOCK_T
 AEGIS_AES_BLOCK_LOAD_64x2(uint64_t a, uint64_t b)
 {
-  return vec_revb(vec_insert(a, vec_promote((unsigned long long) b, 1), 0));
+  return (AEGIS_AES_BLOCK_T) vec_revb(vec_insert(a, vec_promote((unsigned long long) b, 1), 0));
 }
 
 static inline void
@@ -71,7 +71,7 @@ AEGIS_AES_BLOCK_STORE(uint8_t *a, const AEGIS_AES_BLOCK_T b)
 static inline AEGIS_AES_BLOCK_T
 AEGIS_AES_ENC(const AEGIS_AES_BLOCK_T a, const AEGIS_AES_BLOCK_T b)
 {
-  return vec_cipher_be(a, b);
+  return (AEGIS_AES_BLOCK_T) vec_cipher_be(a, b);
 }
 
 static inline void
diff --git a/src/aegis/aegis128l/aegis128l_armcrypto.c b/src/aegis/aegis128l/aegis128l_armcrypto.c
@@ -5,7 +5,9 @@
 ** SPDX-License-Identifier: MIT
 */
 
-#if defined(__aarch64__) || defined(_M_ARM64)
+#include "../common/aeshardware.h"
+
+#if HAS_AEGIS_AES_HARDWARE == AEGIS_AES_HARDWARE_NEON
 
 #include <errno.h>
 #include <stddef.h>
@@ -24,7 +26,11 @@
 #  define __ARM_FEATURE_AES 1
 #endif
 
+#ifdef USE_ARM64_NEON_H
+#include <arm64_neon.h>
+#else
 #include <arm_neon.h>
+#endif
 
 #ifdef __clang__
 #  pragma clang attribute push(__attribute__((target("neon,crypto,aes"))), \
diff --git a/src/aegis/aegis128x2/aegis128x2_altivec.c b/src/aegis/aegis128x2/aegis128x2_altivec.c
@@ -22,7 +22,7 @@
 #ifdef __clang__
 #  pragma clang attribute push(__attribute__((target("altivec,crypto"))), apply_to = function)
 #elif defined(__GNUC__)
-#  pragma GCC target("+altivec+crypto")
+#  pragma GCC target("altivec,crypto")
 #endif
 
 #define AES_BLOCK_LENGTH 32
@@ -63,7 +63,7 @@ static inline AEGIS_AES_BLOCK_T
 AEGIS_AES_BLOCK_LOAD_64x2(uint64_t a, uint64_t b)
 {
     const vector unsigned char t =
-        vec_revb(vec_insert(a, vec_promote((unsigned long long) (b), 1), 0));
+        (vector unsigned char) vec_revb(vec_insert(a, vec_promote((unsigned long long) (b), 1), 0));
     return (AEGIS_AES_BLOCK_T) { t, t };
 }
 static inline void
diff --git a/src/aegis/aegis128x2/aegis128x2_armcrypto.c b/src/aegis/aegis128x2/aegis128x2_armcrypto.c
@@ -5,7 +5,9 @@
 ** SPDX-License-Identifier: MIT
 */
 
-#if defined(__aarch64__) || defined(_M_ARM64)
+#include "../common/aeshardware.h"
+
+#if HAS_AEGIS_AES_HARDWARE == AEGIS_AES_HARDWARE_NEON
 
 #include <errno.h>
 #include <stddef.h>
@@ -24,7 +26,11 @@
 #  define __ARM_FEATURE_AES 1
 #endif
 
+#ifdef USE_ARM64_NEON_H
+#include <arm64_neon.h>
+#else
 #include <arm_neon.h>
+#endif
 
 #ifdef __clang__
 #  pragma clang attribute push(__attribute__((target("neon,crypto,aes"))), \
diff --git a/src/aegis/aegis128x4/aegis128x4_altivec.c b/src/aegis/aegis128x4/aegis128x4_altivec.c
@@ -22,7 +22,7 @@
 #ifdef __clang__
 #  pragma clang attribute push(__attribute__((target("altivec,crypto"))), apply_to = function)
 #elif defined(__GNUC__)
-#  pragma GCC target("+altivec+crypto")
+#  pragma GCC target("altivec,crypto")
 #endif
 
 #define AES_BLOCK_LENGTH 64
@@ -68,7 +68,7 @@ static inline AEGIS_AES_BLOCK_T
 AEGIS_AES_BLOCK_LOAD_64x2(uint64_t a, uint64_t b)
 {
     const vector unsigned char t =
-        vec_revb(vec_insert(a, vec_promote((unsigned long long) (b), 1), 0));
+        (vector unsigned char) vec_revb(vec_insert(a, vec_promote((unsigned long long) (b), 1), 0));
     return (AEGIS_AES_BLOCK_T) { t, t, t, t };
 }
 static inline void
diff --git a/src/aegis/aegis128x4/aegis128x4_armcrypto.c b/src/aegis/aegis128x4/aegis128x4_armcrypto.c
@@ -5,7 +5,9 @@
 ** SPDX-License-Identifier: MIT
 */
 
-#if defined(__aarch64__) || defined(_M_ARM64)
+#include "../common/aeshardware.h"
+
+#if HAS_AEGIS_AES_HARDWARE == AEGIS_AES_HARDWARE_NEON
 
 #include <errno.h>
 #include <stddef.h>
@@ -24,7 +26,11 @@
 #  define __ARM_FEATURE_AES 1
 #endif
 
+#ifdef USE_ARM64_NEON_H
+#include <arm64_neon.h>
+#else
 #include <arm_neon.h>
+#endif
 
 #ifdef __clang__
 #  pragma clang attribute push(__attribute__((target("neon,crypto,aes"))), \
diff --git a/src/aegis/aegis256/aegis256_altivec.c b/src/aegis/aegis256/aegis256_altivec.c
@@ -22,7 +22,7 @@
 #ifdef __clang__
 #  pragma clang attribute push(__attribute__((target("altivec,crypto"))), apply_to = function)
 #elif defined(__GNUC__)
-#  pragma GCC target("+altivec+crypto")
+#  pragma GCC target("altivec,crypto")
 #endif
 
 #define AES_BLOCK_LENGTH 16
@@ -59,7 +59,7 @@ AEGIS_AES_BLOCK_LOAD(const uint8_t *a)
 static inline AEGIS_AES_BLOCK_T
 AEGIS_AES_BLOCK_LOAD_64x2(uint64_t a, uint64_t b)
 {
-  return vec_revb(vec_insert(a, vec_promote((unsigned long long) b, 1), 0));
+  return (AEGIS_AES_BLOCK_T) vec_revb(vec_insert(a, vec_promote((unsigned long long) b, 1), 0));
 }
 
 static inline void
@@ -71,7 +71,7 @@ AEGIS_AES_BLOCK_STORE(uint8_t *a, const AEGIS_AES_BLOCK_T b)
 static inline AEGIS_AES_BLOCK_T
 AEGIS_AES_ENC(const AEGIS_AES_BLOCK_T a, const AEGIS_AES_BLOCK_T b)
 {
-  return vec_cipher_be(a, b);
+  return (AEGIS_AES_BLOCK_T) vec_cipher_be(a, b);
 }
 
 static inline void
diff --git a/src/aegis/aegis256/aegis256_armcrypto.c b/src/aegis/aegis256/aegis256_armcrypto.c
@@ -5,7 +5,9 @@
 ** SPDX-License-Identifier: MIT
 */
 
-#if defined(__aarch64__) || defined(_M_ARM64)
+#include "../common/aeshardware.h"
+
+#if HAS_AEGIS_AES_HARDWARE == AEGIS_AES_HARDWARE_NEON
 
 #include <errno.h>
 #include <stddef.h>
@@ -24,7 +26,11 @@
 #  define __ARM_FEATURE_AES 1
 #endif
 
+#ifdef USE_ARM64_NEON_H
+#include <arm64_neon.h>
+#else
 #include <arm_neon.h>
+#endif
 
 #ifdef __clang__
 #  pragma clang attribute push(__attribute__((target("neon,crypto,aes"))), \
diff --git a/src/aegis/aegis256x2/aegis256x2_altivec.c b/src/aegis/aegis256x2/aegis256x2_altivec.c
@@ -22,7 +22,7 @@
 #ifdef __clang__
 #  pragma clang attribute push(__attribute__((target("altivec,crypto"))), apply_to = function)
 #elif defined(__GNUC__)
-#  pragma GCC target("+altivec+crypto")
+#  pragma GCC target("altivec,crypto")
 #endif
 
 #define AES_BLOCK_LENGTH 32
@@ -63,7 +63,7 @@ static inline AEGIS_AES_BLOCK_T
 AEGIS_AES_BLOCK_LOAD_64x2(uint64_t a, uint64_t b)
 {
     const vector unsigned char t =
-        vec_revb(vec_insert(a, vec_promote((unsigned long long) (b), 1), 0));
+        (vector unsigned char) vec_revb(vec_insert(a, vec_promote((unsigned long long) (b), 1), 0));
     return (AEGIS_AES_BLOCK_T) { t, t };
 }
 
diff --git a/src/aegis/aegis256x2/aegis256x2_armcrypto.c b/src/aegis/aegis256x2/aegis256x2_armcrypto.c
@@ -5,7 +5,9 @@
 ** SPDX-License-Identifier: MIT
 */
 
-#if defined(__aarch64__) || defined(_M_ARM64)
+#include "../common/aeshardware.h"
+
+#if HAS_AEGIS_AES_HARDWARE == AEGIS_AES_HARDWARE_NEON
 
 #include <errno.h>
 #include <stddef.h>
@@ -24,7 +26,11 @@
 #  define __ARM_FEATURE_AES 1
 #endif
 
+#ifdef USE_ARM64_NEON_H
+#include <arm64_neon.h>
+#else
 #include <arm_neon.h>
+#endif
 
 #ifdef __clang__
 #  pragma clang attribute push(__attribute__((target("neon,crypto,aes"))), \
diff --git a/src/aegis/aegis256x4/aegis256x4_altivec.c b/src/aegis/aegis256x4/aegis256x4_altivec.c
@@ -22,7 +22,7 @@
 #ifdef __clang__
 #  pragma clang attribute push(__attribute__((target("altivec,crypto"))), apply_to = function)
 #elif defined(__GNUC__)
-#  pragma GCC target("+altivec+crypto")
+#  pragma GCC target("altivec,crypto")
 #endif
 
 #define AES_BLOCK_LENGTH 64
@@ -68,7 +68,7 @@ static inline AEGIS_AES_BLOCK_T
 AEGIS_AES_BLOCK_LOAD_64x2(uint64_t a, uint64_t b)
 {
     const vector unsigned char t =
-        vec_revb(vec_insert(a, vec_promote((unsigned long long) (b), 1), 0));
+        (vector unsigned char) vec_revb(vec_insert(a, vec_promote((unsigned long long) (b), 1), 0));
     return (AEGIS_AES_BLOCK_T) { t, t, t, t };
 }
 static inline void
diff --git a/src/aegis/aegis256x4/aegis256x4_armcrypto.c b/src/aegis/aegis256x4/aegis256x4_armcrypto.c
@@ -5,7 +5,9 @@
 ** SPDX-License-Identifier: MIT
 */
 
-#if defined(__aarch64__) || defined(_M_ARM64)
+#include "../common/aeshardware.h"
+
+#if HAS_AEGIS_AES_HARDWARE == AEGIS_AES_HARDWARE_NEON
 
 #include <errno.h>
 #include <stddef.h>
@@ -24,7 +26,11 @@
 #  define __ARM_FEATURE_AES 1
 #endif
 
+#ifdef USE_ARM64_NEON_H
+#include <arm64_neon.h>
+#else
 #include <arm_neon.h>
+#endif
 
 #ifdef __clang__
 #  pragma clang attribute push(__attribute__((target("neon,crypto,aes"))), \
diff --git a/src/aegis/common/aeshardware.h b/src/aegis/common/aeshardware.h
@@ -0,0 +1,96 @@
+/*
+** Name:        aeshardware.h
+** Purpose:     Header for AES hardware support detection
+** Copyright:   (c) 2023-2024 Frank Denis
+** SPDX-License-Identifier: MIT
+*/
+
+#ifndef AEGIS_AES_HARDWARE_H
+#define AEGIS_AES_HARDWARE_H
+
+#define AEGIS_AES_HARDWARE_NONE     0
+#define AEGIS_AES_HARDWARE_NI       1
+#define AEGIS_AES_HARDWARE_NEON     2
+#define AEGIS_AES_HARDWARE_ALTIVEC  3
+
+#ifndef AEGIS_OMIT_AES_HARDWARE_SUPPORT
+
+#if defined __ARM_FEATURE_CRYPTO
+#define HAS_AEGIS_AES_HARDWARE AEGIS_AES_HARDWARE_NEON
+
+
+/* --- CLang --- */
+#elif defined(__clang__)
+
+#if __has_attribute(target) && __has_include(<wmmintrin.h>) && (defined(__x86_64__) || defined(__i386))
+#define HAS_AEGIS_AES_HARDWARE AEGIS_AES_HARDWARE_NI
+
+#elif __has_attribute(target) && __has_include(<arm_neon.h>) && (defined(__aarch64__))
+#define HAS_AEGIS_AES_HARDWARE AEGIS_AES_HARDWARE_NEON
+
+#endif
+
+
+/* --- GNU C/C++ */
+#elif defined(__GNUC__)
+
+#if (__GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 4)) && (defined(__x86_64__) || defined(__i386))
+#define HAS_AEGIS_AES_HARDWARE AEGIS_AES_HARDWARE_NI
+#endif
+
+
+/* --- Visual C/C++ --- */
+#elif defined (_MSC_VER)
+
+/* Architecture: x86 or x86_64 */
+#if (defined(_M_X64) || defined(_M_IX86)) && _MSC_FULL_VER >= 150030729
+#define HAS_AEGIS_AES_HARDWARE AEGIS_AES_HARDWARE_NI
+
+/* Architecture: ARM 64-bit */
+#elif defined(_M_ARM64)
+#define HAS_AEGIS_AES_HARDWARE AEGIS_AES_HARDWARE_NEON
+
+/* Use header <arm64_neon.h> instead of <arm_neon.h> */
+#ifndef USE_ARM64_NEON_H
+#define USE_ARM64_NEON_H
+#endif
+
+/* Architecture: ARM 32-bit */
+#elif defined _M_ARM
+#define HAS_AEGIS_AES_HARDWARE AEGIS_AES_HARDWARE_NEON
+
+/* The following #define is required to enable intrinsic definitions
+   that do not omit one of the parameters for vaes[ed]q_u8 */
+#ifndef _ARM_USE_NEW_NEON_INTRINSICS
+#define _ARM_USE_NEW_NEON_INTRINSICS
+#endif
+
+#endif
+
+#else
+
+#define HAS_AEGIS_AES_HARDWARE AEGIS_AES_HARDWARE_NONE
+
+#endif
+
+#if HAS_AEGIS_AES_HARDWARE == AEGIS_AES_HARDWARE_NONE
+
+/* Original checks of libaegis */
+#if defined(__ARM_FEATURE_CRYPTO) && defined(__ARM_FEATURE_AES) && defined(__ARM_NEON)
+#    define HAS_AEGIS_AES_HARDWARE AEGIS_AES_HARDWARE_NEON
+#elif defined(__AES__) && defined(__AVX__)
+#    define HAS_AEGIS_AES_HARDWARE AEGIS_AES_HARDWARE_NI
+#elif defined(__ALTIVEC__) && defined(__CRYPTO__)
+#    define HAS_AEGIS_AES_HARDWARE AEGIS_AES_HARDWARE_ALTIVEC
+#endif
+
+#endif
+
+#else /* AEGIS_OMIT_AES_HARDWARE_SUPPORT defined */
+
+/* Omit AES hardware support */
+#define HAS_AEGIS_AES_HARDWARE AEGIS_AES_HARDWARE_NONE
+
+#endif /* SQLITE3MC_OMIT_AES_HARDWARE_SUPPORT */
+
+#endif /* AEGIS_AES_HARDWARE_H */
diff --git a/src/aegis/common/cpu.h b/src/aegis/common/cpu.h
diff --git a/src/argon2/src/blake2/blake2b.c b/src/argon2/src/blake2/blake2b.c
diff --git a/src/codecext.c b/src/codecext.c

Original file line number	Diff line number	Diff line change
`@@ -22,7 +22,7 @@`
`22`	`22`	`#ifdef __clang__`
`23`	`23`	`# pragma clang attribute push(__attribute__((target("altivec,crypto"))), apply_to = function)`
`24`	`24`	`#elif defined(__GNUC__)`
`25`		`-# pragma GCC target("+altivec+crypto")`
	`25`	`+# pragma GCC target("altivec,crypto")`
`26`	`26`	`#endif`
`27`	`27`
`28`	`28`	`#define AES_BLOCK_LENGTH 16`
`@@ -59,7 +59,7 @@ AEGIS_AES_BLOCK_LOAD(const uint8_t *a)`
`59`	`59`	`static inline AEGIS_AES_BLOCK_T`
`60`	`60`	`AEGIS_AES_BLOCK_LOAD_64x2(uint64_t a, uint64_t b)`
`61`	`61`	`{`
`62`		`- return vec_revb(vec_insert(a, vec_promote((unsigned long long) b, 1), 0));`
	`62`	`+ return (AEGIS_AES_BLOCK_T) vec_revb(vec_insert(a, vec_promote((unsigned long long) b, 1), 0));`
`63`	`63`	`}`
`64`	`64`
`65`	`65`	`static inline void`
`@@ -71,7 +71,7 @@ AEGIS_AES_BLOCK_STORE(uint8_t *a, const AEGIS_AES_BLOCK_T b)`
`71`	`71`	`static inline AEGIS_AES_BLOCK_T`
`72`	`72`	`AEGIS_AES_ENC(const AEGIS_AES_BLOCK_T a, const AEGIS_AES_BLOCK_T b)`
`73`	`73`	`{`
`74`		`- return vec_cipher_be(a, b);`
	`74`	`+ return (AEGIS_AES_BLOCK_T) vec_cipher_be(a, b);`
`75`	`75`	`}`
`76`	`76`
`77`	`77`	`static inline void`