|
24 | 24 | */ |
25 | 25 |
|
26 | 26 | #include <cstdint> |
27 | | -#include <cassert> |
28 | 27 |
|
29 | 28 | #include "gd32.h" |
30 | 29 |
|
31 | 30 | #ifndef NDEBUG |
32 | 31 | #include <cstdio> |
33 | 32 | /* SPI/I2S parameter initialization mask */ |
34 | | -#define SPI_INIT_MASK ((uint32_t)0x00003040U) /*!< SPI parameter initialization mask */ |
35 | | -#define I2S_INIT_MASK ((uint32_t)0x0000F047U) /*!< I2S parameter initialization mask */ |
| 33 | +#define SPI_INIT_MASK ((uint32_t)0x00003040U) /*!< SPI parameter initialization mask */ |
| 34 | +#define I2S_INIT_MASK ((uint32_t)0x0000F047U) /*!< I2S parameter initialization mask */ |
36 | 35 |
|
37 | 36 | /* I2S clock source selection, multiplication and division mask */ |
38 | | -#define I2S1_CLOCK_SEL ((uint32_t)0x00020000U) /* I2S1 clock source selection */ |
39 | | -#define I2S2_CLOCK_SEL ((uint32_t)0x00040000U) /* I2S2 clock source selection */ |
40 | | -#define I2S_CLOCK_MUL_MASK ((uint32_t)0x0000F000U) /* I2S clock multiplication mask */ |
41 | | -#define I2S_CLOCK_DIV_MASK ((uint32_t)0x000000F0U) /* I2S clock division mask */ |
| 37 | +#define I2S1_CLOCK_SEL ((uint32_t)0x00020000U) /* I2S1 clock source selection */ |
| 38 | +#define I2S2_CLOCK_SEL ((uint32_t)0x00040000U) /* I2S2 clock source selection */ |
| 39 | +#define I2S_CLOCK_MUL_MASK ((uint32_t)0x0000F000U) /* I2S clock multiplication mask */ |
| 40 | +#define I2S_CLOCK_DIV_MASK ((uint32_t)0x000000F0U) /* I2S clock division mask */ |
42 | 41 |
|
43 | 42 | /* default value and offset */ |
44 | | -#define SPI_I2SPSC_DEFAULT_VALUE ((uint32_t)0x00000002U) /* default value of SPI_I2SPSC register */ |
45 | | -#define RCU_CFG1_PREDV1_OFFSET 4U /* PREDV1 offset in RCU_CFG1 */ |
46 | | -#define RCU_CFG1_PLL2MF_OFFSET 12U /* PLL2MF offset in RCU_CFG1 */ |
47 | | - |
48 | | -void I2sPscConfigDump([[maybe_unused]] uint32_t spi_periph, uint32_t audiosample, uint32_t frameformat, uint32_t mckout) { |
49 | | - uint32_t i2sdiv = 2U, i2sof = 0U; |
50 | | - uint32_t clks = 0U; |
51 | | - uint32_t i2sclock = 0U; |
52 | | - |
53 | | -#if defined (GD32F10X_CL) || defined (GD32F20X_CL) |
54 | | - /* get the I2S clock source */ |
55 | | - if (SPI1 == ((uint32_t) spi_periph)) { |
56 | | - /* I2S1 clock source selection */ |
57 | | - clks = I2S1_CLOCK_SEL; |
58 | | - } else { |
59 | | - /* I2S2 clock source selection */ |
60 | | - clks = I2S2_CLOCK_SEL; |
61 | | - } |
62 | | - |
63 | | - if (0U != (RCU_CFG1 & clks)) { |
64 | | - /* get RCU PLL2 clock multiplication factor */ |
65 | | - clks = (uint32_t) ((RCU_CFG1 & I2S_CLOCK_MUL_MASK) |
66 | | - >> RCU_CFG1_PLL2MF_OFFSET); |
67 | | - |
68 | | - if ((clks > 5U) && (clks < 15U)) { |
69 | | - /* multiplier is between 8 and 14 */ |
70 | | - clks += 2U; |
71 | | - } else { |
72 | | - if (15U == clks) { |
73 | | - /* multiplier is 20 */ |
74 | | - clks = 20U; |
75 | | - } |
76 | | - } |
77 | | - |
78 | | - /* get the PREDV1 value */ |
79 | | - i2sclock = (uint32_t) (((RCU_CFG1 & I2S_CLOCK_DIV_MASK) |
80 | | - >> RCU_CFG1_PREDV1_OFFSET) + 1U); |
81 | | - /* calculate I2S clock based on PLL2 and PREDV1 */ |
82 | | - i2sclock = (uint32_t) ((HXTAL_VALUE / i2sclock) * clks * 2U); |
83 | | - } else |
| 43 | +#define SPI_I2SPSC_DEFAULT_VALUE ((uint32_t)0x00000002U) /* default value of SPI_I2SPSC register */ |
| 44 | +#define RCU_CFG1_PREDV1_OFFSET 4U /* PREDV1 offset in RCU_CFG1 */ |
| 45 | +#define RCU_CFG1_PLL2MF_OFFSET 12U /* PLL2MF offset in RCU_CFG1 */ |
| 46 | + |
| 47 | +void I2sPscConfigDump([[maybe_unused]] uint32_t spi_periph, uint32_t audiosample, uint32_t frameformat, uint32_t mckout) |
| 48 | +{ |
| 49 | + uint32_t i2sdiv = 2U, i2sof = 0U; |
| 50 | + uint32_t clks = 0U; |
| 51 | + uint32_t i2sclock = 0U; |
| 52 | + |
| 53 | +#if defined(GD32F10X_CL) || defined(GD32F20X_CL) |
| 54 | + /* get the I2S clock source */ |
| 55 | + if (SPI1 == spi_periph) |
| 56 | + { |
| 57 | + /* I2S1 clock source selection */ |
| 58 | + clks = I2S1_CLOCK_SEL; |
| 59 | + } |
| 60 | + else |
| 61 | + { |
| 62 | + /* I2S2 clock source selection */ |
| 63 | + clks = I2S2_CLOCK_SEL; |
| 64 | + } |
| 65 | + |
| 66 | + if (0U != (RCU_CFG1 & clks)) |
| 67 | + { |
| 68 | + /* get RCU PLL2 clock multiplication factor */ |
| 69 | + clks = ((RCU_CFG1 & I2S_CLOCK_MUL_MASK) >> RCU_CFG1_PLL2MF_OFFSET); |
| 70 | + |
| 71 | + if ((clks > 5U) && (clks < 15U)) |
| 72 | + { |
| 73 | + /* multiplier is between 8 and 14 */ |
| 74 | + clks += 2U; |
| 75 | + } |
| 76 | + else |
| 77 | + { |
| 78 | + if (15U == clks) |
| 79 | + { |
| 80 | + /* multiplier is 20 */ |
| 81 | + clks = 20U; |
| 82 | + } |
| 83 | + } |
| 84 | + |
| 85 | + /* get the PREDV1 value */ |
| 86 | + i2sclock = static_cast<uint32_t>(((RCU_CFG1 & I2S_CLOCK_DIV_MASK) >> RCU_CFG1_PREDV1_OFFSET) + 1U); |
| 87 | + /* calculate I2S clock based on PLL2 and PREDV1 */ |
| 88 | + i2sclock = static_cast<uint32_t>((HXTAL_VALUE / i2sclock) * clks * 2U); |
| 89 | + } |
| 90 | + else |
84 | 91 | #endif |
85 | | - { |
86 | | - /* get system clock */ |
87 | | - i2sclock = rcu_clock_freq_get(CK_SYS); |
88 | | - } |
89 | | - |
90 | | - /* config the prescaler depending on the mclk output state, the frame format and audio sample rate */ |
91 | | - if (I2S_MCKOUT_ENABLE == mckout) { |
92 | | - clks = (uint32_t) (((i2sclock / 256U) * 10U) / audiosample); |
93 | | - } else { |
94 | | - if (I2S_FRAMEFORMAT_DT16B_CH16B == frameformat) { |
95 | | - clks = (uint32_t) (((i2sclock / 32U) * 10U) / audiosample); |
96 | | - } else { |
97 | | - clks = (uint32_t) (((i2sclock / 64U) * 10U) / audiosample); |
98 | | - } |
99 | | - } |
100 | | - |
101 | | - /* remove the floating point */ |
102 | | - clks = (clks + 5U) / 10U; |
103 | | - i2sof = (clks & 0x00000001U); |
104 | | - i2sdiv = ((clks - i2sof) / 2U); |
105 | | - i2sof = (i2sof << 8U); |
106 | | - |
107 | | - /* set the default values */ |
108 | | - if ((i2sdiv < 2U) || (i2sdiv > 255U)) { |
109 | | - i2sdiv = 2U; |
110 | | - i2sof = 0U; |
111 | | - } |
112 | | - |
113 | | - printf("clks=%u, i2sclock=%u, i2sof=%u, i2sdiv=%u\n", clks, i2sclock, i2sof, i2sdiv); |
| 92 | + { |
| 93 | + /* get system clock */ |
| 94 | + i2sclock = rcu_clock_freq_get(CK_SYS); |
| 95 | + } |
| 96 | + |
| 97 | + /* config the prescaler depending on the mclk output state, the frame format and audio sample rate */ |
| 98 | + if (I2S_MCKOUT_ENABLE == mckout) |
| 99 | + { |
| 100 | + clks = static_cast<uint32_t>(((i2sclock / 256U) * 10U) / audiosample); |
| 101 | + } |
| 102 | + else |
| 103 | + { |
| 104 | + if (I2S_FRAMEFORMAT_DT16B_CH16B == frameformat) |
| 105 | + { |
| 106 | + clks = static_cast<uint32_t>(((i2sclock / 32U) * 10U) / audiosample); |
| 107 | + } |
| 108 | + else |
| 109 | + { |
| 110 | + clks = static_cast<uint32_t>(((i2sclock / 64U) * 10U) / audiosample); |
| 111 | + } |
| 112 | + } |
| 113 | + |
| 114 | + /* remove the floating point */ |
| 115 | + clks = (clks + 5U) / 10U; |
| 116 | + i2sof = (clks & 0x00000001U); |
| 117 | + i2sdiv = ((clks - i2sof) / 2U); |
| 118 | + i2sof = (i2sof << 8U); |
| 119 | + |
| 120 | + /* set the default values */ |
| 121 | + if ((i2sdiv < 2U) || (i2sdiv > 255U)) |
| 122 | + { |
| 123 | + i2sdiv = 2U; |
| 124 | + i2sof = 0U; |
| 125 | + } |
| 126 | + |
| 127 | + printf("clks=%u, i2sclock=%u, i2sof=%u, i2sdiv=%u\n", clks, i2sclock, i2sof, i2sdiv); |
114 | 128 | } |
115 | 129 | #endif |
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