Skip to content

Commit a09717f

Browse files
vikramRHvikramRH
committed
[NPM] Inprogress test updates for NPM
this should go along with patch that enables NPM
1 parent 0c0ef5a commit a09717f

File tree

740 files changed

+1063
-1065
lines changed

Some content is hidden

Large Commits have some content hidden by default. Use the searchbox below for content that may be hidden.

740 files changed

+1063
-1065
lines changed

‎llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -34,6 +34,7 @@
3434
#include "llvm/Analysis/OptimizationRemarkEmitter.h"
3535
#include "llvm/BinaryFormat/ELF.h"
3636
#include "llvm/CodeGen/MachineFrameInfo.h"
37+
#include "llvm/CodeGen/MachineFunctionAnalysis.h"
3738
#include "llvm/CodeGen/MachineModuleInfo.h"
3839
#include "llvm/CodeGen/MachineOptimizationRemarkEmitter.h"
3940
#include "llvm/IR/DiagnosticInfo.h"

‎llvm/test/CodeGen/AMDGPU/GlobalISel/twoaddr-extract-dyn-v7f64.mir‎

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,4 @@
11
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 4
2-
# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx900 -early-live-intervals -run-pass=liveintervals -run-pass=twoaddressinstruction -verify-machineinstrs -o - %s | FileCheck %s
32
# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx900 -passes='require<live-intervals>,two-address-instruction' -verify-each -o - %s | FileCheck %s
43

54
---

‎llvm/test/CodeGen/AMDGPU/SRSRC-GIT-clobber-check.mir‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
# RUN: llc -mtriple=amdgcn--amdpal -mcpu=gfx1010 -run-pass=prologepilog -o - %s | FileCheck %s
1+
# RUN: llc -mtriple=amdgcn--amdpal -mcpu=gfx1010 -passes=prolog-epilog -o - %s | FileCheck %s
22

33
# On PAL, we need to ensure SRSRC do not clobber GIT pointer, passed
44
# in SGPR8 for HS or GS

‎llvm/test/CodeGen/AMDGPU/aa-as-infer.ll‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
2-
; RUN: opt -mtriple=amdgcn-amd-amdhsa -passes=amdgpu-attributor -S %s -o - | FileCheck %s
2+
; RUN: opt -mtriple=amdgcn-amd-amdhsa -passes="amdgpu-attributor" -S %s -o - | FileCheck %s
33

44
@g1 = protected addrspace(1) externally_initialized global i32 0, align 4
55
@g2 = protected addrspace(1) externally_initialized global i32 0, align 4

‎llvm/test/CodeGen/AMDGPU/accvgpr-copy.mir‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1,9 +1,9 @@
11
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2-
# RUN: llc -mtriple=amdgcn -mcpu=gfx908 -run-pass postrapseudos -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX908 %s
3-
# RUN: llc -mtriple=amdgcn -mcpu=gfx90a -run-pass postrapseudos -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX90A %s
4-
# RUN: llc -mtriple=amdgcn -mcpu=gfx942 -run-pass postrapseudos -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX942 %s
2+
# RUN: llc -mtriple=amdgcn -mcpu=gfx908 -passes post-ra-pseudos -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX908 %s
3+
# RUN: llc -mtriple=amdgcn -mcpu=gfx90a -passes post-ra-pseudos -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX90A %s
4+
# RUN: llc -mtriple=amdgcn -mcpu=gfx942 -passes post-ra-pseudos -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX942 %s
55

6-
# RUN: llc -mtriple=amdgcn -mcpu=gfx942 -passes=post-ra-pseudos -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX942 %s
6+
# RUN: llc -mtriple=amdgcn -mcpu=gfx942 -passes="post-ra-pseudos" -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX942 %s
77

88
--- |
99
define amdgpu_kernel void @a_to_v() #0 { ret void }

‎llvm/test/CodeGen/AMDGPU/accvgpr-spill-scc-clobber.mir‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1,11 +1,11 @@
11
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2-
# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx908 -verify-machineinstrs -run-pass=prologepilog %s -o - | FileCheck -check-prefix=GFX908 %s
2+
# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx908 -verify-machineinstrs -passes=prolog-epilog %s -o - | FileCheck -check-prefix=GFX908 %s
33
# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx908 -passes='prolog-epilog' %s -o - | FileCheck -check-prefix=GFX908 %s
4-
# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx90a -verify-machineinstrs -run-pass=prologepilog %s -o - | FileCheck -check-prefix=GFX90A %s
4+
# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx90a -verify-machineinstrs -passes=prolog-epilog %s -o - | FileCheck -check-prefix=GFX90A %s
55
# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx90a -passes='prolog-epilog' %s -o - | FileCheck -check-prefix=GFX90A %s
6-
# RUN: llc -mattr=+enable-flat-scratch -mtriple=amdgcn-amd-amdhsa -mcpu=gfx908 -verify-machineinstrs -run-pass=prologepilog %s -o - | FileCheck -check-prefix=GFX908-FLATSCR %s
6+
# RUN: llc -mattr=+enable-flat-scratch -mtriple=amdgcn-amd-amdhsa -mcpu=gfx908 -verify-machineinstrs -passes=prolog-epilog %s -o - | FileCheck -check-prefix=GFX908-FLATSCR %s
77
# RUN: llc -mattr=+enable-flat-scratch -mtriple=amdgcn-amd-amdhsa -mcpu=gfx908 -passes='prolog-epilog' %s -o - | FileCheck -check-prefix=GFX908-FLATSCR %s
8-
# RUN: llc -mattr=+enable-flat-scratch -mtriple=amdgcn-amd-amdhsa -mcpu=gfx90a -verify-machineinstrs -run-pass=prologepilog %s -o - | FileCheck -check-prefix=GFX90A-FLATSCR %s
8+
# RUN: llc -mattr=+enable-flat-scratch -mtriple=amdgcn-amd-amdhsa -mcpu=gfx90a -verify-machineinstrs -passes=prolog-epilog %s -o - | FileCheck -check-prefix=GFX90A-FLATSCR %s
99
# RUN: llc -mattr=+enable-flat-scratch -mtriple=amdgcn-amd-amdhsa -mcpu=gfx90a -passes='prolog-epilog' %s -o - | FileCheck -check-prefix=GFX90A-FLATSCR %s
1010

1111
---

‎llvm/test/CodeGen/AMDGPU/add_sub_u64_pseudos.mir‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1,8 +1,8 @@
11
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2-
# RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -run-pass=finalize-isel -o - %s | FileCheck -check-prefix=GFX11 %s
3-
# RUN: llc -mtriple=amdgcn -mcpu=gfx1200 -run-pass=finalize-isel -o - %s | FileCheck -check-prefix=GFX12 %s
4-
# RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -passes=finalize-isel -o - %s | FileCheck -check-prefix=GFX11 %s
5-
# RUN: llc -mtriple=amdgcn -mcpu=gfx1200 -passes=finalize-isel -o - %s | FileCheck -check-prefix=GFX12 %s
2+
# RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -passes="finalize-isel" -o - %s | FileCheck -check-prefix=GFX11 %s
3+
# RUN: llc -mtriple=amdgcn -mcpu=gfx1200 -passes="finalize-isel" -o - %s | FileCheck -check-prefix=GFX12 %s
4+
# RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -passes="finalize-isel" -o - %s | FileCheck -check-prefix=GFX11 %s
5+
# RUN: llc -mtriple=amdgcn -mcpu=gfx1200 -passes="finalize-isel" -o - %s | FileCheck -check-prefix=GFX12 %s
66

77
---
88
name: reg_ops

‎llvm/test/CodeGen/AMDGPU/addrspacecast-captured.ll‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
; RUN: opt -S -mtriple=amdgcn-unknown-amdhsa -mcpu=kaveri -passes=amdgpu-promote-alloca < %s | FileCheck %s
1+
; RUN: opt -S -mtriple=amdgcn-unknown-amdhsa -mcpu=kaveri -passes="amdgpu-promote-alloca" < %s | FileCheck %s
22
; Nothing should be done if the addrspacecast is captured.
33

44
declare void @consume_ptr2int(i32) #0

‎llvm/test/CodeGen/AMDGPU/addrspacecast-constantexpr.ll‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-globals
2-
; RUN: opt -mtriple=amdgcn-unknown-amdhsa -S -passes=amdgpu-attributor < %s | FileCheck -check-prefix=HSA %s
2+
; RUN: opt -mtriple=amdgcn-unknown-amdhsa -S -passes="amdgpu-attributor" < %s | FileCheck -check-prefix=HSA %s
33

44
declare void @llvm.memcpy.p1.p4.i32(ptr addrspace(1) nocapture, ptr addrspace(4) nocapture, i32, i1) #0
55

‎llvm/test/CodeGen/AMDGPU/addrspacecast.ll‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
1-
; RUN: opt -passes=amdgpu-attributor -mcpu=kaveri -mattr=-promote-alloca < %s | llc | FileCheck -enable-var-scope -check-prefix=HSA -check-prefix=CI %s
2-
; RUN: opt -passes=amdgpu-attributor -mcpu=gfx900 -mattr=-promote-alloca < %s | llc | FileCheck -enable-var-scope -check-prefix=HSA -check-prefix=GFX9 %s
1+
; RUN: opt -passes="amdgpu-attributor" -mcpu=kaveri -mattr=-promote-alloca < %s | llc | FileCheck -enable-var-scope -check-prefix=HSA -check-prefix=CI %s
2+
; RUN: opt -passes="amdgpu-attributor" -mcpu=gfx900 -mattr=-promote-alloca < %s | llc | FileCheck -enable-var-scope -check-prefix=HSA -check-prefix=GFX9 %s
33

44
target triple = "amdgcn-amd-amdhsa"
55

0 commit comments

Comments
 (0)