Issue related to custom ip

[akshay07ask]

I am using arty a7 100 board with microblaze running at 100 mhz and ddr at 200 mhz . Instead of having axi gpio or uart I hv a custom ip attached to perif interconnect. I want to run this custom ip through microblaze signals frm vitis . When I try to write some value on this address of custom ip through vitis , I am not getting output or any changes on board.for testing purpose trying to turn onboard leds which i mapped in custom ip output to slv reg0 so when some value is changed of this register from vitis I need led to light up ( for testing purpose) I have a different controller code which I want to run through microblaze signals as a host. Tried connecting ila probes to the axi output I'm not getting any changes too.could please let me know what issue I might have?

[viktor-nikolov]

Hi @akshay07ask!

Do I understand correctly that your custom IP is supposed to work as an AXI Slave?

Tried connecting ila probes to the axi output I'm not getting any changes too.

This is suspicious. Even if there is a bug in your custom AXI Slave preventing it from working correctly, you should see activity on the AXI bus.
I would focus on this in the first troubleshooting step.

You can make a copy of your HW design. Remove your custom IP and replace it with AXI GPIO. Connect the AXI GPIO to an LED on the board. Try blinking that LED with a program running on the MicroBlaze.

You have to make this fundamental design work. Only then can you be sure the MicroBlaze can communicate over the AXI bus and introduce your custom IP into the design.

BTW, if your custom IP is brand new, i.e., untested in other designs, I highly recommend that, before trying it in a complex HW design with MicroBlaze, you debug it standalone in simulation. Just the IP alone and its I/O signals. In my experience, ChatGPT is pretty good at writing test bench scripts for Vivado simulation of AXI Slave.

[akshay07ask]

I tried using axi gpio to blink led it worked. The custom ip is supposed to be working as axi slv. I even tried connecting ila probes on output of axi interconnect I'm not getting any changes on trigger.

[akshay07ask]

The c code is simple I hv kept a pointer to the custom ip address and I write 0000000F so at slv reg 0 i should get this value. This I hv mapped to leds on custom ip.

[akshay07ask]

I'll try simulation of custom ip and update soon.

[viktor-nikolov]

Hi!

I tried using axi gpio to blink led it worked.

Good to hear that the fundametal design works.

Just to make sure: The address you are writing to is the one Vivado shows in the Address Editor window as the Base Address of your IP. Right?

Another way to check that Vitis understood well how an AXI Slave is mapped to memory is to check the xparameters.h after you generetate platform in Vitis.
For example, in one of my projects I'm using a custom AXI Slave, which is named fifo_stream_test_0 in the diagram. Vitis then generated the following definitions in the xparameters.h:

/* Peripheral Definitions for peripheral FIFO_STREAM_TEST_0 */
#define XPAR_FIFO_STREAM_TEST_0_BASEADDR 0x60000000
#define XPAR_FIFO_STREAM_TEST_0_HIGHADDR 0x7FFFFFFF

[akshay07ask]

Yes I have used the address from the address editor window it given as 44A0 0000.
I tried on vitis xsdb console to read the address it gave me DEC0DE1C it was telling that the address is available. But when I tried to write a value on this address through console and again read it was still showing me same DEC0DE1C and value was not written on that address.