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| 1 | +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5 |
| 2 | +; RUN: opt < %s -passes=instcombine -S | FileCheck %s |
| 3 | + |
| 4 | +; Test known bits refinements for pattern: a * (b - c) + c * d |
| 5 | +; where a > 0, c > 0, b > 0, d > 0, and b > c. |
| 6 | +; This pattern is a generalization of lerp and it appears frequently in graphics operations. |
| 7 | + |
| 8 | +define i32 @test_clamp(i8 %a, i8 %c, i8 %d) { |
| 9 | +; CHECK-LABEL: define i32 @test_clamp( |
| 10 | +; CHECK-SAME: i8 [[A:%.*]], i8 [[C:%.*]], i8 [[D:%.*]]) { |
| 11 | +; CHECK-NEXT: [[A32:%.*]] = zext i8 [[A]] to i32 |
| 12 | +; CHECK-NEXT: [[C32:%.*]] = zext i8 [[C]] to i32 |
| 13 | +; CHECK-NEXT: [[D32:%.*]] = zext i8 [[D]] to i32 |
| 14 | +; CHECK-NEXT: [[SUB:%.*]] = xor i32 [[C32]], 255 |
| 15 | +; CHECK-NEXT: [[MUL1:%.*]] = mul nuw nsw i32 [[SUB]], [[A32]] |
| 16 | +; CHECK-NEXT: [[MUL2:%.*]] = mul nuw nsw i32 [[C32]], [[D32]] |
| 17 | +; CHECK-NEXT: [[ADD:%.*]] = add nuw nsw i32 [[MUL1]], [[MUL2]] |
| 18 | +; CHECK-NEXT: ret i32 [[ADD]] |
| 19 | +; |
| 20 | + %a32 = zext i8 %a to i32 |
| 21 | + %c32 = zext i8 %c to i32 |
| 22 | + %d32 = zext i8 %d to i32 |
| 23 | + %sub = sub i32 255, %c32 |
| 24 | + %mul1 = mul i32 %a32, %sub |
| 25 | + %mul2 = mul i32 %c32, %d32 |
| 26 | + %add = add i32 %mul1, %mul2 |
| 27 | + %cmp = icmp ugt i32 %add, 65535 |
| 28 | + %result = select i1 %cmp, i32 65535, i32 %add |
| 29 | + ret i32 %result |
| 30 | +} |
| 31 | + |
| 32 | +define i1 @test_trunc_cmp(i8 %a, i8 %c, i8 %d) { |
| 33 | +; CHECK-LABEL: define i1 @test_trunc_cmp( |
| 34 | +; CHECK-SAME: i8 [[A:%.*]], i8 [[C:%.*]], i8 [[D:%.*]]) { |
| 35 | +; CHECK-NEXT: [[A32:%.*]] = zext i8 [[A]] to i32 |
| 36 | +; CHECK-NEXT: [[C32:%.*]] = zext i8 [[C]] to i32 |
| 37 | +; CHECK-NEXT: [[D32:%.*]] = zext i8 [[D]] to i32 |
| 38 | +; CHECK-NEXT: [[SUB:%.*]] = xor i32 [[C32]], 255 |
| 39 | +; CHECK-NEXT: [[MUL1:%.*]] = mul nuw nsw i32 [[SUB]], [[A32]] |
| 40 | +; CHECK-NEXT: [[MUL2:%.*]] = mul nuw nsw i32 [[C32]], [[D32]] |
| 41 | +; CHECK-NEXT: [[ADD:%.*]] = add nuw nsw i32 [[MUL1]], [[MUL2]] |
| 42 | +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[ADD]], 1234 |
| 43 | +; CHECK-NEXT: ret i1 [[CMP]] |
| 44 | +; |
| 45 | + %a32 = zext i8 %a to i32 |
| 46 | + %c32 = zext i8 %c to i32 |
| 47 | + %d32 = zext i8 %d to i32 |
| 48 | + %sub = sub i32 255, %c32 |
| 49 | + %mul1 = mul i32 %a32, %sub |
| 50 | + %mul2 = mul i32 %c32, %d32 |
| 51 | + %add = add i32 %mul1, %mul2 |
| 52 | + %trunc = trunc i32 %add to i16 |
| 53 | + %cmp = icmp eq i16 %trunc, 1234 |
| 54 | + ret i1 %cmp |
| 55 | +} |
| 56 | + |
| 57 | +define i1 @test_trunc_cmp_xor(i8 %a, i8 %c, i8 %d) { |
| 58 | +; CHECK-LABEL: define i1 @test_trunc_cmp_xor( |
| 59 | +; CHECK-SAME: i8 [[A:%.*]], i8 [[C:%.*]], i8 [[D:%.*]]) { |
| 60 | +; CHECK-NEXT: [[A32:%.*]] = zext i8 [[A]] to i32 |
| 61 | +; CHECK-NEXT: [[C32:%.*]] = zext i8 [[C]] to i32 |
| 62 | +; CHECK-NEXT: [[D32:%.*]] = zext i8 [[D]] to i32 |
| 63 | +; CHECK-NEXT: [[SUB:%.*]] = xor i32 [[C32]], 255 |
| 64 | +; CHECK-NEXT: [[MUL1:%.*]] = mul nuw nsw i32 [[SUB]], [[A32]] |
| 65 | +; CHECK-NEXT: [[MUL2:%.*]] = mul nuw nsw i32 [[C32]], [[D32]] |
| 66 | +; CHECK-NEXT: [[ADD:%.*]] = add nuw nsw i32 [[MUL1]], [[MUL2]] |
| 67 | +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[ADD]], 1234 |
| 68 | +; CHECK-NEXT: ret i1 [[CMP]] |
| 69 | +; |
| 70 | + %a32 = zext i8 %a to i32 |
| 71 | + %c32 = zext i8 %c to i32 |
| 72 | + %d32 = zext i8 %d to i32 |
| 73 | + %sub = xor i32 255, %c32 |
| 74 | + %mul1 = mul i32 %a32, %sub |
| 75 | + %mul2 = mul i32 %c32, %d32 |
| 76 | + %add = add i32 %mul1, %mul2 |
| 77 | + %trunc = trunc i32 %add to i16 |
| 78 | + %cmp = icmp eq i16 %trunc, 1234 |
| 79 | + ret i1 %cmp |
| 80 | +} |
| 81 | + |
| 82 | +define i1 @test_trunc_cmp_arbitrary_b(i8 %a, i8 %b, i8 %c, i8 %d) { |
| 83 | +; CHECK-LABEL: define i1 @test_trunc_cmp_arbitrary_b( |
| 84 | +; CHECK-SAME: i8 [[A:%.*]], i8 [[B:%.*]], i8 [[C:%.*]], i8 [[D:%.*]]) { |
| 85 | +; CHECK-NEXT: [[A32:%.*]] = zext i8 [[A]] to i32 |
| 86 | +; CHECK-NEXT: [[B32:%.*]] = zext i8 [[B]] to i32 |
| 87 | +; CHECK-NEXT: [[C32:%.*]] = zext i8 [[C]] to i32 |
| 88 | +; CHECK-NEXT: [[D32:%.*]] = zext i8 [[D]] to i32 |
| 89 | +; CHECK-NEXT: [[SUB:%.*]] = sub nuw nsw i32 [[B32]], [[C32]] |
| 90 | +; CHECK-NEXT: [[MUL1:%.*]] = mul nuw nsw i32 [[SUB]], [[A32]] |
| 91 | +; CHECK-NEXT: [[MUL2:%.*]] = mul nuw nsw i32 [[C32]], [[D32]] |
| 92 | +; CHECK-NEXT: [[ADD:%.*]] = add nuw nsw i32 [[MUL1]], [[MUL2]] |
| 93 | +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[ADD]], 1234 |
| 94 | +; CHECK-NEXT: ret i1 [[CMP]] |
| 95 | +; |
| 96 | + %a32 = zext i8 %a to i32 |
| 97 | + %b32 = zext i8 %b to i32 |
| 98 | + %c32 = zext i8 %c to i32 |
| 99 | + %d32 = zext i8 %d to i32 |
| 100 | + %sub = sub nsw nuw i32 %b32, %c32 |
| 101 | + %mul1 = mul i32 %a32, %sub |
| 102 | + %mul2 = mul i32 %c32, %d32 |
| 103 | + %add = add i32 %mul1, %mul2 |
| 104 | + %trunc = trunc i32 %add to i16 |
| 105 | + %cmp = icmp eq i16 %trunc, 1234 |
| 106 | + ret i1 %cmp |
| 107 | +} |
| 108 | + |
| 109 | + |
| 110 | +define i1 @test_trunc_cmp_no_a(i8 %b, i8 %c, i8 %d) { |
| 111 | +; CHECK-LABEL: define i1 @test_trunc_cmp_no_a( |
| 112 | +; CHECK-SAME: i8 [[B:%.*]], i8 [[C:%.*]], i8 [[D:%.*]]) { |
| 113 | +; CHECK-NEXT: [[B32:%.*]] = zext i8 [[B]] to i32 |
| 114 | +; CHECK-NEXT: [[C32:%.*]] = zext i8 [[C]] to i32 |
| 115 | +; CHECK-NEXT: [[D32:%.*]] = zext i8 [[D]] to i32 |
| 116 | +; CHECK-NEXT: [[MUL1:%.*]] = sub nuw nsw i32 [[B32]], [[C32]] |
| 117 | +; CHECK-NEXT: [[MUL2:%.*]] = mul nuw nsw i32 [[C32]], [[D32]] |
| 118 | +; CHECK-NEXT: [[ADD:%.*]] = add nuw nsw i32 [[MUL1]], [[MUL2]] |
| 119 | +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[ADD]], 1234 |
| 120 | +; CHECK-NEXT: ret i1 [[CMP]] |
| 121 | +; |
| 122 | + %b32 = zext i8 %b to i32 |
| 123 | + %c32 = zext i8 %c to i32 |
| 124 | + %d32 = zext i8 %d to i32 |
| 125 | + %sub = sub nuw i32 %b32, %c32 |
| 126 | + %mul2 = mul i32 %c32, %d32 |
| 127 | + %add = add i32 %sub, %mul2 |
| 128 | + %trunc = trunc i32 %add to i16 |
| 129 | + %cmp = icmp eq i16 %trunc, 1234 |
| 130 | + ret i1 %cmp |
| 131 | +} |
| 132 | + |
| 133 | +define i1 @test_trunc_cmp_no_d(i8 %a, i8 %b, i8 %c) { |
| 134 | +; CHECK-LABEL: define i1 @test_trunc_cmp_no_d( |
| 135 | +; CHECK-SAME: i8 [[A:%.*]], i8 [[B:%.*]], i8 [[C:%.*]]) { |
| 136 | +; CHECK-NEXT: [[A32:%.*]] = zext i8 [[A]] to i32 |
| 137 | +; CHECK-NEXT: [[B32:%.*]] = zext i8 [[B]] to i32 |
| 138 | +; CHECK-NEXT: [[C32:%.*]] = zext i8 [[C]] to i32 |
| 139 | +; CHECK-NEXT: [[SUB:%.*]] = sub nuw nsw i32 [[B32]], [[C32]] |
| 140 | +; CHECK-NEXT: [[MUL1:%.*]] = mul nuw nsw i32 [[SUB]], [[A32]] |
| 141 | +; CHECK-NEXT: [[ADD:%.*]] = add nuw nsw i32 [[MUL1]], [[C32]] |
| 142 | +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[ADD]], 1234 |
| 143 | +; CHECK-NEXT: ret i1 [[CMP]] |
| 144 | +; |
| 145 | + %a32 = zext i8 %a to i32 |
| 146 | + %b32 = zext i8 %b to i32 |
| 147 | + %c32 = zext i8 %c to i32 |
| 148 | + %sub = sub nsw nuw i32 %b32, %c32 |
| 149 | + %mul1 = mul i32 %a32, %sub |
| 150 | + %add = add i32 %mul1, %c32 |
| 151 | + %trunc = trunc i32 %add to i16 |
| 152 | + %cmp = icmp eq i16 %trunc, 1234 |
| 153 | + ret i1 %cmp |
| 154 | +} |
| 155 | + |
| 156 | +define i1 @test_trunc_cmp_xor_negative(i8 %a, i8 %c, i8 %d) { |
| 157 | +; CHECK-LABEL: define i1 @test_trunc_cmp_xor_negative( |
| 158 | +; CHECK-SAME: i8 [[A:%.*]], i8 [[C:%.*]], i8 [[D:%.*]]) { |
| 159 | +; CHECK-NEXT: [[A32:%.*]] = zext i8 [[A]] to i32 |
| 160 | +; CHECK-NEXT: [[C32:%.*]] = zext i8 [[C]] to i32 |
| 161 | +; CHECK-NEXT: [[D32:%.*]] = zext i8 [[D]] to i32 |
| 162 | +; CHECK-NEXT: [[SUB:%.*]] = xor i32 [[C32]], 234 |
| 163 | +; CHECK-NEXT: [[MUL1:%.*]] = mul nuw nsw i32 [[SUB]], [[A32]] |
| 164 | +; CHECK-NEXT: [[MUL2:%.*]] = mul nuw nsw i32 [[C32]], [[D32]] |
| 165 | +; CHECK-NEXT: [[ADD:%.*]] = add nuw nsw i32 [[MUL1]], [[MUL2]] |
| 166 | +; CHECK-NEXT: [[TRUNC:%.*]] = trunc i32 [[ADD]] to i16 |
| 167 | +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i16 [[TRUNC]], 1234 |
| 168 | +; CHECK-NEXT: ret i1 [[CMP]] |
| 169 | +; |
| 170 | + %a32 = zext i8 %a to i32 |
| 171 | + %c32 = zext i8 %c to i32 |
| 172 | + %d32 = zext i8 %d to i32 |
| 173 | + %sub = xor i32 234, %c32 |
| 174 | + %mul1 = mul i32 %a32, %sub |
| 175 | + %mul2 = mul i32 %c32, %d32 |
| 176 | + %add = add i32 %mul1, %mul2 |
| 177 | + ; We should keep the trunc in this case |
| 178 | + %trunc = trunc i32 %add to i16 |
| 179 | + %cmp = icmp eq i16 %trunc, 1234 |
| 180 | + ret i1 %cmp |
| 181 | +} |
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