99import struct
1010from typing import Any , Dict , Iterable , List , Optional , Tuple
1111
12- import volatility3
12+ from volatility3 import classproperty
1313from volatility3 .framework import exceptions , interfaces , constants
1414from volatility3 .framework .configuration import requirements
1515from volatility3 .framework .layers import linear
@@ -75,13 +75,13 @@ def __init__(
7575 # These can vary depending on the type of space
7676 self ._index_shift = math .ceil (math .log2 (struct .calcsize (self ._entry_format )))
7777
78- @volatility3 . classproperty
78+ @classproperty
7979 @functools .lru_cache
8080 def page_shift (cls ) -> int :
8181 """Page shift for the intel memory layers."""
8282 return cls ._page_size_in_bits
8383
84- @volatility3 . classproperty
84+ @classproperty
8585 @functools .lru_cache
8686 def page_size (cls ) -> int :
8787 """Page size for the intel memory layers.
@@ -90,30 +90,30 @@ def page_size(cls) -> int:
9090 """
9191 return 1 << cls ._page_size_in_bits
9292
93- @volatility3 . classproperty
93+ @classproperty
9494 @functools .lru_cache
9595 def page_mask (cls ) -> int :
9696 """Page mask for the intel memory layers."""
9797 return ~ (cls .page_size - 1 )
9898
99- @volatility3 . classproperty
99+ @classproperty
100100 @functools .lru_cache
101101 def bits_per_register (cls ) -> int :
102102 """Returns the bits_per_register to determine the range of an
103103 IntelTranslationLayer."""
104104 return cls ._bits_per_register
105105
106- @volatility3 . classproperty
106+ @classproperty
107107 @functools .lru_cache
108108 def minimum_address (cls ) -> int :
109109 return 0
110110
111- @volatility3 . classproperty
111+ @classproperty
112112 @functools .lru_cache
113113 def maximum_address (cls ) -> int :
114114 return (1 << cls ._maxvirtaddr ) - 1
115115
116- @volatility3 . classproperty
116+ @classproperty
117117 def structure (cls ) -> List [Tuple [str , int , bool ]]:
118118 return cls ._structure
119119
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