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[RISCV] +zve64x is sufficient for the zvfbfmin and zvfbfwma intrinsic tests. NFC.
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‎clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vcreate.c‎

Lines changed: 2 additions & 3 deletions
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// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 4
22
// REQUIRES: riscv-registered-target
3-
// RUN: %clang_cc1 -triple riscv64 -target-feature +v \
4-
// RUN: -target-feature +zvfbfmin \
5-
// RUN: -target-feature +zvfbfwma -disable-O0-optnone \
3+
// RUN: %clang_cc1 -triple riscv64 -target-feature +zve64x \
4+
// RUN: -target-feature +zvfbfmin -disable-O0-optnone \
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// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
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// RUN: FileCheck --check-prefix=CHECK-RV64 %s
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‎clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vfncvtbf16.c‎

Lines changed: 2 additions & 2 deletions
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// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 4
22
// REQUIRES: riscv-registered-target
3-
// RUN: %clang_cc1 -triple riscv64 -target-feature +v \
4-
// RUN: -target-feature +zvfbfmin -disable-O0-optnone \
3+
// RUN: %clang_cc1 -triple riscv64 -target-feature +zve64x \
4+
// RUN: -target-feature +zvfbfmin -disable-O0-optnone \
55
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
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// RUN: FileCheck --check-prefix=CHECK-RV64 %s
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‎clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vfwcvtbf16.c‎

Lines changed: 2 additions & 2 deletions
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@@ -1,7 +1,7 @@
11
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 4
22
// REQUIRES: riscv-registered-target
3-
// RUN: %clang_cc1 -triple riscv64 -target-feature +v \
4-
// RUN: -target-feature +zvfbfmin -disable-O0-optnone \
3+
// RUN: %clang_cc1 -triple riscv64 -target-feature +zve64x \
4+
// RUN: -target-feature +zvfbfmin -disable-O0-optnone \
55
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
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// RUN: FileCheck --check-prefix=CHECK-RV64 %s
77

‎clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vget.c‎

Lines changed: 2 additions & 3 deletions
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11
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 4
22
// REQUIRES: riscv-registered-target
3-
// RUN: %clang_cc1 -triple riscv64 -target-feature +v \
4-
// RUN: -target-feature +zvfbfmin \
5-
// RUN: -target-feature +zvfbfwma -disable-O0-optnone \
3+
// RUN: %clang_cc1 -triple riscv64 -target-feature +zve64x \
4+
// RUN: -target-feature +zvfbfmin -disable-O0-optnone \
65
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
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// RUN: FileCheck --check-prefix=CHECK-RV64 %s
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‎clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vle16.c‎

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1,8 +1,7 @@
11
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 4
22
// REQUIRES: riscv-registered-target
3-
// RUN: %clang_cc1 -triple riscv64 -target-feature +v \
4-
// RUN: -target-feature +zvfbfmin \
5-
// RUN: -target-feature +zvfbfwma -disable-O0-optnone \
3+
// RUN: %clang_cc1 -triple riscv64 -target-feature +zve64x \
4+
// RUN: -target-feature +zvfbfmin -disable-O0-optnone \
65
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
76
// RUN: FileCheck --check-prefix=CHECK-RV64 %s
87

‎clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vle16ff.c‎

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1,8 +1,7 @@
11
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 4
22
// REQUIRES: riscv-registered-target
3-
// RUN: %clang_cc1 -triple riscv64 -target-feature +v \
4-
// RUN: -target-feature +zvfbfmin \
5-
// RUN: -target-feature +zvfbfwma -disable-O0-optnone \
3+
// RUN: %clang_cc1 -triple riscv64 -target-feature +zve64x \
4+
// RUN: -target-feature +zvfbfmin -disable-O0-optnone \
65
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
76
// RUN: FileCheck --check-prefix=CHECK-RV64 %s
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‎clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlmul_ext_v.c‎

Lines changed: 2 additions & 3 deletions
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// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 4
22
// REQUIRES: riscv-registered-target
3-
// RUN: %clang_cc1 -triple riscv64 -target-feature +v \
4-
// RUN: -target-feature +zvfbfmin \
5-
// RUN: -target-feature +zvfbfwma -disable-O0-optnone \
3+
// RUN: %clang_cc1 -triple riscv64 -target-feature +zve64x \
4+
// RUN: -target-feature +zvfbfmin -disable-O0-optnone \
65
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
76
// RUN: FileCheck --check-prefix=CHECK-RV64 %s
87

‎clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlmul_trunc_v.c‎

Lines changed: 2 additions & 3 deletions
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11
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 4
22
// REQUIRES: riscv-registered-target
3-
// RUN: %clang_cc1 -triple riscv64 -target-feature +v \
4-
// RUN: -target-feature +zvfbfmin \
5-
// RUN: -target-feature +zvfbfwma -disable-O0-optnone \
3+
// RUN: %clang_cc1 -triple riscv64 -target-feature +zve64x \
4+
// RUN: -target-feature +zvfbfmin -disable-O0-optnone \
65
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
76
// RUN: FileCheck --check-prefix=CHECK-RV64 %s
87

‎clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vloxei16.c‎

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1,8 +1,7 @@
11
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 4
22
// REQUIRES: riscv-registered-target
3-
// RUN: %clang_cc1 -triple riscv64 -target-feature +v \
4-
// RUN: -target-feature +zvfbfmin \
5-
// RUN: -target-feature +zvfbfwma -disable-O0-optnone \
3+
// RUN: %clang_cc1 -triple riscv64 -target-feature +zve64x \
4+
// RUN: -target-feature +zvfbfmin -disable-O0-optnone \
65
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
76
// RUN: FileCheck --check-prefix=CHECK-RV64 %s
87

‎clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vloxseg2ei16.c‎

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1,8 +1,7 @@
11
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 4
22
// REQUIRES: riscv-registered-target
3-
// RUN: %clang_cc1 -triple riscv64 -target-feature +v \
4-
// RUN: -target-feature +zvfbfmin \
5-
// RUN: -target-feature +zvfbfwma -disable-O0-optnone \
3+
// RUN: %clang_cc1 -triple riscv64 -target-feature +zve64x \
4+
// RUN: -target-feature +zvfbfmin -disable-O0-optnone \
65
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
76
// RUN: FileCheck --check-prefix=CHECK-RV64 %s
87

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