fix: make StructReader lazy #22759
a10yci.yml
on: pull_request
lint-toml
8s
validate-workflow-yaml
5s
Python (lint)
1m 3s
Python (test)
3m 12s
Python (wheel build)
2m 12s
Rust (docs)
2m 48s
Check build with minimal dependencies
1m 55s
Rust (lint)
1m 14s
Rust (lint, no default)
1m 19s
Rust (semver checks)
4m 26s
Rust tests (sanitizer)
2m 15s
CUDA tests
1m 56s
Java
2m 38s
Benchmark with Codspeed (GPU)
4m 56s
C++ build
2m 1s
wasm-integration
2m 46s
Rust tests (miri)
3m 24s
Check generated source files are up to date
3m 28s
Matrix: bench-codspeed
Matrix: build-rust
Matrix: License Check and Audit Check
Matrix: rust-coverage
Matrix: rust-test-other
Annotations
6 errors, 1 warning, and 30 notices
|
Rust (lint)
Process completed with exit code 101.
|
|
Rust (lint, no default)
Process completed with exit code 1.
|
|
Rust tests (linux-arm64)
Process completed with exit code 100.
|
|
Rust tests (coverage) (tests)
Process completed with exit code 100.
|
|
Rust (semver checks)
The process '/home/runner/.cargo/bin/cargo' failed with exit code 1
|
|
Rust tests (windows-x64)
Process completed with exit code 1.
|
|
Benchmark with Codspeed (GPU)
Not all required perf events available. Missing: [cpu-cycles, l1d_cache, l2d_cache, l2d_cache_refill, instructions], disabling detailed event sampling.
|
|
sccache stats
97% - 341 hits, 9 misses, 0 errors
|
|
sccache stats
97% - 368 hits, 12 misses, 0 errors
|
|
sccache stats
94% - 183 hits, 12 misses, 0 errors
|
|
sccache stats
96% - 283 hits, 12 misses, 0 errors
|
|
sccache stats
100% - 1593 hits, 2 misses, 0 errors
|
|
sccache stats
96% - 259 hits, 12 misses, 0 errors
|
|
sccache stats
98% - 456 hits, 10 misses, 0 errors
|
|
sccache stats
100% - 289 hits, 0 misses, 0 errors
|
|
sccache stats
99% - 633 hits, 5 misses, 0 errors
|
|
sccache stats
98% - 1085 hits, 20 misses, 0 errors
|
|
sccache stats
95% - 320 hits, 17 misses, 0 errors
|
|
sccache stats
98% - 601 hits, 10 misses, 0 errors
|
|
sccache stats
100% - 529 hits, 0 misses, 0 errors
|
|
sccache stats
0% - 0 hits, 0 misses, 0 errors
|
|
sccache stats
98% - 685 hits, 11 misses, 2 errors
|
|
sccache stats
99% - 649 hits, 8 misses, 0 errors
|
|
sccache stats
99% - 2970 hits, 23 misses, 0 errors
|
|
sccache stats
96% - 261 hits, 12 misses, 0 errors
|
|
sccache stats
0% - 0 hits, 0 misses, 0 errors
|
|
sccache stats
0% - 0 hits, 0 misses, 0 errors
|
|
sccache stats
98% - 344 hits, 6 misses, 0 errors
|
|
sccache stats
95% - 367 hits, 18 misses, 0 errors
|
|
sccache stats
99% - 1478 hits, 14 misses, 0 errors
|
|
sccache stats
95% - 254 hits, 12 misses, 0 errors
|
|
sccache stats
99% - 1877 hits, 20 misses, 0 errors
|
|
sccache stats
97% - 1356 hits, 40 misses, 0 errors
|
|
sccache stats
98% - 518 hits, 12 misses, 0 errors
|
|
sccache stats
97% - 1465 hits, 49 misses, 0 errors
|
|
sccache stats
98% - 1570 hits, 33 misses, 0 errors
|
|
sccache stats
0% - 0 hits, 0 misses, 0 errors
|