renaming lane dispatch and gather units for clarity

Author: tinebp

hw/rtl/VX_gpu_pkg.sv

@@ -636,7 +636,7 @@ package VX_gpu_pkg;
         logic                               eop;
     } operands_t;
 
-    // warning: this layout should not be modified without updating VX_dispatch_unit!!!
+    // warning: this layout should not be modified without updating VX_lane_dispatch!!!
     typedef struct packed {
         logic [UUID_WIDTH-1:0]              uuid;
         logic [ISSUE_WIS_W-1:0]             wis;

hw/rtl/core/VX_alu_unit.sv

@@ -44,11 +44,11 @@ module VX_alu_unit import VX_gpu_pkg::*; #(
         .data_t (alu_result_t)
     ) per_block_result_if[BLOCK_SIZE]();
 
-    VX_dispatch_unit #(
+    VX_lane_dispatch #(
         .BLOCK_SIZE (BLOCK_SIZE),
         .NUM_LANES  (NUM_LANES),
         .OUT_BUF    (PARTIAL_BW ? 3 : 0)
-    ) dispatch_unit (
+    ) lane_dispatch (
         .clk        (clk),
         .reset      (reset),
         .dispatch_if(dispatch_if),
@@ -113,11 +113,11 @@ module VX_alu_unit import VX_gpu_pkg::*; #(
     `endif
     end
 
-    VX_gather_unit #(
+    VX_lane_gather #(
         .BLOCK_SIZE (BLOCK_SIZE),
         .NUM_LANES  (NUM_LANES),
         .OUT_BUF    (PARTIAL_BW ? 3 : 0)
-    ) gather_unit (
+    ) lane_gather (
         .clk       (clk),
         .reset     (reset),
         .result_if (per_block_result_if),

hw/rtl/core/VX_dispatch_unit.sv hw/rtl/core/VX_lane_dispatch.svhw/rtl/core/VX_dispatch_unit.sv renamed to hw/rtl/core/VX_lane_dispatch.sv

@@ -13,7 +13,7 @@
 
 `include "VX_define.vh"
 
-module VX_dispatch_unit import VX_gpu_pkg::*; #(
+module VX_lane_dispatch import VX_gpu_pkg::*; #(
     parameter BLOCK_SIZE = 1,
     parameter NUM_LANES  = 1,
     parameter OUT_BUF    = 0,

hw/rtl/core/VX_gather_unit.sv hw/rtl/core/VX_lane_gather.svhw/rtl/core/VX_gather_unit.sv renamed to hw/rtl/core/VX_lane_gather.sv

@@ -13,7 +13,7 @@
 
 `include "VX_define.vh"
 
-module VX_gather_unit import VX_gpu_pkg::*; #(
+module VX_lane_gather import VX_gpu_pkg::*; #(
     parameter BLOCK_SIZE = 1,
     parameter NUM_LANES  = 1,
     parameter OUT_BUF    = 0

hw/rtl/core/VX_lsu_unit.sv

@@ -37,11 +37,11 @@ module VX_lsu_unit import VX_gpu_pkg::*; #(
         .data_t (lsu_execute_t)
     ) per_block_execute_if[BLOCK_SIZE]();
 
-    VX_dispatch_unit #(
+    VX_lane_dispatch #(
         .BLOCK_SIZE (BLOCK_SIZE),
         .NUM_LANES  (NUM_LANES),
         .OUT_BUF    (3)
-    ) dispatch_unit (
+    ) lane_dispatch (
         .clk        (clk),
         .reset      (reset),
         .dispatch_if(dispatch_if),
@@ -65,11 +65,11 @@ module VX_lsu_unit import VX_gpu_pkg::*; #(
         );
     end
 
-    VX_gather_unit #(
+    VX_lane_gather #(
         .BLOCK_SIZE (BLOCK_SIZE),
         .NUM_LANES  (NUM_LANES),
         .OUT_BUF    (3)
-    ) gather_unit (
+    ) lane_gather (
         .clk       (clk),
         .reset     (reset),
         .result_if (per_block_result_if),

hw/rtl/core/VX_sfu_unit.sv

@@ -57,11 +57,11 @@ module VX_sfu_unit import VX_gpu_pkg::*; #(
         .data_t (sfu_result_t)
     ) per_block_result_if[BLOCK_SIZE]();
 
-    VX_dispatch_unit #(
+    VX_lane_dispatch #(
         .BLOCK_SIZE (BLOCK_SIZE),
         .NUM_LANES  (NUM_LANES),
         .OUT_BUF    (3)
-    ) dispatch_unit (
+    ) lane_dispatch (
         .clk        (clk),
         .reset      (reset),
         .dispatch_if(dispatch_if),
@@ -136,11 +136,11 @@ module VX_sfu_unit import VX_gpu_pkg::*; #(
         .result_if      (pe_result_if[PE_IDX_CSRS])
     );
 
-    VX_gather_unit #(
+    VX_lane_gather #(
         .BLOCK_SIZE (BLOCK_SIZE),
         .NUM_LANES  (NUM_LANES),
         .OUT_BUF    (3)
-    ) gather_unit (
+    ) lane_gather (
         .clk       (clk),
         .reset     (reset),
         .result_if (per_block_result_if),

hw/rtl/fpu/VX_fpu_unit.sv

@@ -37,11 +37,11 @@ module VX_fpu_unit import VX_gpu_pkg::*, VX_fpu_pkg::*; #(
         .data_t (fpu_execute_t)
     ) per_block_execute_if[BLOCK_SIZE]();
 
-    VX_dispatch_unit #(
+    VX_lane_dispatch #(
         .BLOCK_SIZE (BLOCK_SIZE),
         .NUM_LANES  (NUM_LANES),
         .OUT_BUF    (PARTIAL_BW ? 3 : 0)
-    ) dispatch_unit (
+    ) lane_dispatch (
         .clk        (clk),
         .reset      (reset),
         .dispatch_if(dispatch_if),
@@ -238,11 +238,11 @@ module VX_fpu_unit import VX_gpu_pkg::*, VX_fpu_pkg::*; #(
         assign per_block_result_if[block_idx].data.header.wb = 1'b1;
     end
 
-    VX_gather_unit #(
+    VX_lane_gather #(
         .BLOCK_SIZE (BLOCK_SIZE),
         .NUM_LANES  (NUM_LANES),
         .OUT_BUF    (PARTIAL_BW ? 3 : 0)
-    ) gather_unit (
+    ) lane_gather (
         .clk       (clk),
         .reset     (reset),
         .result_if (per_block_result_if),

hw/rtl/tcu/VX_tcu_unit.sv

@@ -38,11 +38,11 @@ module VX_tcu_unit import VX_gpu_pkg::*, VX_tcu_pkg::*; #(
         .data_t (tcu_execute_t)
     ) per_block_execute_if[BLOCK_SIZE]();
 
-    VX_dispatch_unit #(
+    VX_lane_dispatch #(
         .BLOCK_SIZE (BLOCK_SIZE),
         .NUM_LANES  (NUM_LANES),
         .OUT_BUF    (3)
-    ) dispatch_unit (
+    ) lane_dispatch (
         .clk        (clk),
         .reset      (reset),
         .dispatch_if(dispatch_if),
@@ -65,11 +65,11 @@ module VX_tcu_unit import VX_gpu_pkg::*, VX_tcu_pkg::*; #(
         );
     end
 
-    VX_gather_unit #(
+    VX_lane_gather #(
         .BLOCK_SIZE (BLOCK_SIZE),
         .NUM_LANES  (NUM_LANES),
         .OUT_BUF    (3)
-    ) gather_unit (
+    ) lane_gather (
         .clk       (clk),
         .reset     (reset),
         .result_if (per_block_result_if),