bitfield which covers three or more lanes does not work in mid-lanes.

[lswang2]

"config":{ "bits":32 },
"reg": [ {"name":"FIELD_1","bits":8}, {"bits":24} ] }

The bit 23:16 have to be gray but remains in white color.

The labelArr function need to be modified as below

        if floor(e["lsb"] / self.mod) < self.index and \
            floor(e["msb"] / self.mod) > self.index:
            lsb = self.index*self.mod
            msb = (self.index + 1)*self.mod - 1
        elif floor(e["lsb"] / self.mod) == self.index:
            lsbm = e["lsbm"]
            lsb = e["lsb"]
            if floor(e["msb"] / self.mod) == self.index:
                msb = e["msb"]
                msbm = e["msbm"]
        elif floor(e["msb"] / self.mod) == self.index:
            msb = e["msb"]
            msbm = e["msbm"]
        else:
            continue