@@ -4672,56 +4672,56 @@ macro_rules! for_each_op {
46724672 input: Reg ,
46734673 } ,
46744674
4675- /// Wasm `f32.abs` instruction.
4675+ /// Wasm `f32.abs` equivalent Wasmi instruction.
46764676 #[ snake_name( f32_abs) ]
46774677 F32Abs {
46784678 @result: Reg ,
46794679 /// The register holding the input of the instruction.
46804680 input: Reg ,
46814681 } ,
4682- /// Wasm `f32.neg` instruction.
4682+ /// Wasm `f32.neg` equivalent Wasmi instruction.
46834683 #[ snake_name( f32_neg) ]
46844684 F32Neg {
46854685 @result: Reg ,
46864686 /// The register holding the input of the instruction.
46874687 input: Reg ,
46884688 } ,
4689- /// Wasm `f32.ceil` instruction.
4689+ /// Wasm `f32.ceil` equivalent Wasmi instruction.
46904690 #[ snake_name( f32_ceil) ]
46914691 F32Ceil {
46924692 @result: Reg ,
46934693 /// The register holding the input of the instruction.
46944694 input: Reg ,
46954695 } ,
4696- /// Wasm `f32.floor` instruction.
4696+ /// Wasm `f32.floor` equivalent Wasmi instruction.
46974697 #[ snake_name( f32_floor) ]
46984698 F32Floor {
46994699 @result: Reg ,
47004700 /// The register holding the input of the instruction.
47014701 input: Reg ,
47024702 } ,
4703- /// Wasm `f32.trunc` instruction.
4703+ /// Wasm `f32.trunc` equivalent Wasmi instruction.
47044704 #[ snake_name( f32_trunc) ]
47054705 F32Trunc {
47064706 @result: Reg ,
47074707 /// The register holding the input of the instruction.
47084708 input: Reg ,
47094709 } ,
4710- /// Wasm `f32.nearest` instruction.
4710+ /// Wasm `f32.nearest` equivalent Wasmi instruction.
47114711 #[ snake_name( f32_nearest) ]
47124712 F32Nearest {
47134713 @result: Reg ,
47144714 /// The register holding the input of the instruction.
47154715 input: Reg ,
47164716 } ,
4717- /// Wasm `f32.sqrt` instruction.
4717+ /// Wasm `f32.sqrt` equivalent Wasmi instruction.
47184718 #[ snake_name( f32_sqrt) ]
47194719 F32Sqrt {
47204720 @result: Reg ,
47214721 /// The register holding the input of the instruction.
47224722 input: Reg ,
47234723 } ,
4724- /// Wasm `f32.add` instruction: `r0 = r1 + r2`
4724+ /// Wasm `f32.add` equivalent Wasmi instruction.
47254725 #[ snake_name( f32_add) ]
47264726 F32Add {
47274727 @result: Reg ,
@@ -4730,7 +4730,7 @@ macro_rules! for_each_op {
47304730 /// The register holding the right-hand side value.
47314731 rhs: Reg ,
47324732 } ,
4733- /// Wasm `f32.sub` instruction: `r0 = r1 - r2`
4733+ /// Wasm `f32.sub` equivalent Wasmi instruction.
47344734 #[ snake_name( f32_sub) ]
47354735 F32Sub {
47364736 @result: Reg ,
@@ -4739,7 +4739,7 @@ macro_rules! for_each_op {
47394739 /// The register holding the right-hand side value.
47404740 rhs: Reg ,
47414741 } ,
4742- /// Wasm `f32.mul` instruction: `r0 = r1 * r2`
4742+ /// Wasm `f32.mul` equivalent Wasmi instruction.
47434743 #[ snake_name( f32_mul) ]
47444744 F32Mul {
47454745 @result: Reg ,
@@ -4748,7 +4748,7 @@ macro_rules! for_each_op {
47484748 /// The register holding the right-hand side value.
47494749 rhs: Reg ,
47504750 } ,
4751- /// Wasm `f32.div` instruction: `r0 = r1 / r2`
4751+ /// Wasm `f32.div` equivalent Wasmi instruction.
47524752 #[ snake_name( f32_div) ]
47534753 F32Div {
47544754 @result: Reg ,
@@ -4757,7 +4757,7 @@ macro_rules! for_each_op {
47574757 /// The register holding the right-hand side value.
47584758 rhs: Reg ,
47594759 } ,
4760- /// Wasm `f32.min` instruction: `r0 = min(r1, r2)`
4760+ /// Wasm `f32.min` equivalent Wasmi instruction.
47614761 #[ snake_name( f32_min) ]
47624762 F32Min {
47634763 @result: Reg ,
@@ -4766,7 +4766,7 @@ macro_rules! for_each_op {
47664766 /// The register holding the right-hand side value.
47674767 rhs: Reg ,
47684768 } ,
4769- /// Wasm `f32.max` instruction: `r0 = max(r1, r2)`
4769+ /// Wasm `f32.max` equivalent Wasmi instruction.
47704770 #[ snake_name( f32_max) ]
47714771 F32Max {
47724772 @result: Reg ,
@@ -4775,7 +4775,7 @@ macro_rules! for_each_op {
47754775 /// The register holding the right-hand side value.
47764776 rhs: Reg ,
47774777 } ,
4778- /// Wasm `f32.copysign` instruction: `r0 = copysign(r1, r2)`
4778+ /// Wasm `f32.copysign` equivalent Wasmi instruction.
47794779 #[ snake_name( f32_copysign) ]
47804780 F32Copysign {
47814781 @result: Reg ,
@@ -4784,7 +4784,7 @@ macro_rules! for_each_op {
47844784 /// The register holding the right-hand side value.
47854785 rhs: Reg ,
47864786 } ,
4787- /// Wasm `f32.copysign` instruction with immediate: `r0 = copysign(r1, c0)`
4787+ /// Wasm `f32.copysign` equivalent Wasmi instruction with NaN canonicalization.
47884788 #[ snake_name( f32_copysign_imm) ]
47894789 F32CopysignImm {
47904790 @result: Reg ,
@@ -4794,56 +4794,56 @@ macro_rules! for_each_op {
47944794 rhs: Sign <f32 >,
47954795 } ,
47964796
4797- /// Wasm `f64.abs` instruction.
4797+ /// Wasm `f64.abs` equivalent Wasmi instruction.
47984798 #[ snake_name( f64_abs) ]
47994799 F64Abs {
48004800 @result: Reg ,
48014801 /// The register holding the input of the instruction.
48024802 input: Reg ,
48034803 } ,
4804- /// Wasm `f64.neg` instruction.
4804+ /// Wasm `f64.neg` equivalent Wasmi instruction.
48054805 #[ snake_name( f64_neg) ]
48064806 F64Neg {
48074807 @result: Reg ,
48084808 /// The register holding the input of the instruction.
48094809 input: Reg ,
48104810 } ,
4811- /// Wasm `f64.ceil` instruction.
4811+ /// Wasm `f64.ceil` equivalent Wasmi instruction.
48124812 #[ snake_name( f64_ceil) ]
48134813 F64Ceil {
48144814 @result: Reg ,
48154815 /// The register holding the input of the instruction.
48164816 input: Reg ,
48174817 } ,
4818- /// Wasm `f64.floor` instruction.
4818+ /// Wasm `f64.floor` equivalent Wasmi instruction.
48194819 #[ snake_name( f64_floor) ]
48204820 F64Floor {
48214821 @result: Reg ,
48224822 /// The register holding the input of the instruction.
48234823 input: Reg ,
48244824 } ,
4825- /// Wasm `f64.trunc` instruction.
4825+ /// Wasm `f64.trunc` equivalent Wasmi instruction.
48264826 #[ snake_name( f64_trunc) ]
48274827 F64Trunc {
48284828 @result: Reg ,
48294829 /// The register holding the input of the instruction.
48304830 input: Reg ,
48314831 } ,
4832- /// Wasm `f64.nearest` instruction.
4832+ /// Wasm `f64.nearest` equivalent Wasmi instruction.
48334833 #[ snake_name( f64_nearest) ]
48344834 F64Nearest {
48354835 @result: Reg ,
48364836 /// The register holding the input of the instruction.
48374837 input: Reg ,
48384838 } ,
4839- /// Wasm `f64.sqrt` instruction.
4839+ /// Wasm `f64.sqrt` equivalent Wasmi instruction.
48404840 #[ snake_name( f64_sqrt) ]
48414841 F64Sqrt {
48424842 @result: Reg ,
48434843 /// The register holding the input of the instruction.
48444844 input: Reg ,
48454845 } ,
4846- /// Wasm `f64.add` instruction: `r0 = r1 + r2`
4846+ /// Wasm `f64.add` equivalent Wasmi instruction.
48474847 #[ snake_name( f64_add) ]
48484848 F64Add {
48494849 @result: Reg ,
@@ -4852,7 +4852,7 @@ macro_rules! for_each_op {
48524852 /// The register holding the right-hand side value.
48534853 rhs: Reg ,
48544854 } ,
4855- /// Wasm `f64.sub` instruction: `r0 = r1 - r2`
4855+ /// Wasm `f64.sub` equivalent Wasmi instruction.
48564856 #[ snake_name( f64_sub) ]
48574857 F64Sub {
48584858 @result: Reg ,
@@ -4861,7 +4861,7 @@ macro_rules! for_each_op {
48614861 /// The register holding the right-hand side value.
48624862 rhs: Reg ,
48634863 } ,
4864- /// Wasm `f64.mul` instruction: `r0 = r1 * r2`
4864+ /// Wasm `f64.mul` equivalent Wasmi instruction.
48654865 #[ snake_name( f64_mul) ]
48664866 F64Mul {
48674867 @result: Reg ,
@@ -4870,7 +4870,7 @@ macro_rules! for_each_op {
48704870 /// The register holding the right-hand side value.
48714871 rhs: Reg ,
48724872 } ,
4873- /// Wasm `f64.div` instruction: `r0 = r1 / r2`
4873+ /// Wasm `f64.div` equivalent Wasmi instruction.
48744874 #[ snake_name( f64_div) ]
48754875 F64Div {
48764876 @result: Reg ,
@@ -4879,7 +4879,7 @@ macro_rules! for_each_op {
48794879 /// The register holding the right-hand side value.
48804880 rhs: Reg ,
48814881 } ,
4882- /// Wasm `f64.min` instruction: `r0 = min(r1, r2)`
4882+ /// Wasm `f64.min` equivalent Wasmi instruction.
48834883 #[ snake_name( f64_min) ]
48844884 F64Min {
48854885 @result: Reg ,
@@ -4888,7 +4888,7 @@ macro_rules! for_each_op {
48884888 /// The register holding the right-hand side value.
48894889 rhs: Reg ,
48904890 } ,
4891- /// Wasm `f64.max` instruction: `r0 = max(r1, r2)`
4891+ /// Wasm `f64.max` equivalent Wasmi instruction.
48924892 #[ snake_name( f64_max) ]
48934893 F64Max {
48944894 @result: Reg ,
@@ -4897,7 +4897,7 @@ macro_rules! for_each_op {
48974897 /// The register holding the right-hand side value.
48984898 rhs: Reg ,
48994899 } ,
4900- /// Wasm `f64.copysign` instruction: `r0 = copysign(r1, r2)`
4900+ /// Wasm `f64.copysign` equivalent Wasmi instruction.
49014901 #[ snake_name( f64_copysign) ]
49024902 F64Copysign {
49034903 @result: Reg ,
@@ -4906,7 +4906,7 @@ macro_rules! for_each_op {
49064906 /// The register holding the right-hand side value.
49074907 rhs: Reg ,
49084908 } ,
4909- /// Wasm `f64.copysign` instruction with immediate: `r0 = copysign(r1, c0)`
4909+ /// Wasm `f64.copysign` equivalent Wasmi instruction with imediate `rhs` value.
49104910 #[ snake_name( f64_copysign_imm) ]
49114911 F64CopysignImm {
49124912 @result: Reg ,
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