Update boards, platforms and programmers file

Signed-off-by: Ajay Bhargav <[email protected]>

Author: ajaybhargav

LICENSE

@@ -1,6 +1,6 @@
 MIT License
 
-Copyright (c) 2020 SiWi Embedded Solutions
+Copyright (c) 2021 WAYBYTE Solutions
 
 Permission is hereby granted, free of charge, to any person obtaining a copy
 of this software and associated documentation files (the "Software"), to deal

README.md

@@ -1,20 +1,20 @@
-# siwiduino
-Arduino framework for SIWI GSM modules
+# LogicROM Arduino
+Arduino framework for LOGICROM
 
 # Installation
 
 ## Add Board to Arduino Board Manager
 * Open Arduino IDE
 * Go To **File** ˃ **Preferences** ˃
-* Add URL to _Additional Board Manager URLs_: https://siwiembedded.github.io/package_siwigsm_index.json
+* Add URL to _Additional Board Manager URLs_: https://waybyte.github.io/package_logicrom_index.json
 * Click OK
 
 ## Install Board
 * Go To Arduino IDE Menu, **Tools** ˃ **Board** ˃ **Board Manager**
-* In search box enter: _siwigsm_
-* Click Install for _SIWIGSM Arduino Boards_
+* In search box enter: _logic_
+* Click Install for _LOGICROM Arduino Boards_
 
-# SIWIGSM Board Configuration
+# LOGICROM Board Configuration
 Make sure _S20 GSM Board_ is selected from Board Manager after Installation.
 
 ## Build Type
@@ -32,7 +32,7 @@ User can select standard I/O port for `printf` function from following options
 ## SIWI S20U GSM Module
 * S20U Module
 * S20 GSM development Board
-<img src="https://siwiembedded.github.io/asset/s20gsm_board.png" alt="s20 gsm board" width="50%">
+<img src="https://waybyte.github.io/asset/s20gsm_board.png" alt="s20 gsm board" width="50%">
 
 ## Quectel M66 2G GSM
 <img src="https://www.quectel.com/UploadImage/Product/20200304152709774.png" alt="Quectel M66" width="50%">
@@ -45,4 +45,3 @@ User can select standard I/O port for `printf` function from following options
 
 ## Quectel M56 GSM
 <img src="https://www.quectel.com/UploadImage/Product/20200304115535722.png" alt="Quectel M56" width="50%">
-

boards.txt

@@ -1,5 +1,5 @@
-# Copyright (c) 2020 SiWi Embedded Solutions. All right reserved.
-# https://www.siwi.in/
+# Copyright (c) 2021 WAYBYTE Solutions. All right reserved.
+# https://www.waybyte.in/
 #
 
 menu.debug=Build Type
@@ -9,7 +9,7 @@ menu.stdio=Select STDIO Port
 s20gsm.name=S20 GSM Board
 
 # build
-s20gsm.build.core=siwigsm
+s20gsm.build.core=logicrom
 s20gsm.build.cpu=arm9ejs
 s20gsm.build.f_cpu=260000000
 s20gsm.build.board=SIWI_S20GSM
@@ -35,9 +35,9 @@ s20gsm.menu.stdio.ttyusb=USB Uart (/dev/ttyUSB0)
 s20gsm.menu.stdio.ttyusb.build.stdio_port=/dev/ttyUSB0
 
 # upload
-s20gsm.bootloader.tool=siwiflasher
-s20gsm.upload.tool=siwiflasher
-s20gsm.upload.protocol=siwiflasher
+s20gsm.bootloader.tool=logicromflasher
+s20gsm.upload.tool=logicromflasher
+s20gsm.upload.protocol=logicromflasher
 s20gsm.upload.maximum_size=262144
 s20gsm.upload.maximum_ram_size=96256
 s20gsm.upload.speed=460800
@@ -48,7 +48,7 @@ s20gsm.upload.wait_for_upload_port=true
 quectelm66.name=Quectel M66
 
 # build
-quectelm66.build.core=siwigsm
+quectelm66.build.core=logicrom
 quectelm66.build.cpu=arm9ejs
 quectelm66.build.f_cpu=260000000
 quectelm66.build.board=QUECTEL_M66TEA
@@ -70,9 +70,9 @@ quectelm66.menu.stdio.ttys2=Uart2 (/dev/ttyS2)
 quectelm66.menu.stdio.ttys2.build.stdio_port=/dev/ttyS2
 
 # upload
-quectelm66.bootloader.tool=siwiflasher
-quectelm66.upload.tool=siwiflasher
-quectelm66.upload.protocol=siwiflasher
+quectelm66.bootloader.tool=logicromflasher
+quectelm66.upload.tool=logicromflasher
+quectelm66.upload.protocol=logicromflasher
 quectelm66.upload.maximum_size=262144
 quectelm66.upload.maximum_ram_size=96256
 quectelm66.upload.speed=460800
@@ -83,7 +83,7 @@ quectelm66.upload.wait_for_upload_port=true
 quectelmc60.name=Quectel MC60
 
 # build
-quectelmc60.build.core=siwigsm
+quectelmc60.build.core=logicrom
 quectelmc60.build.cpu=arm9ejs
 quectelmc60.build.f_cpu=260000000
 quectelmc60.build.board=QUECTEL_MC60TEA
@@ -105,9 +105,9 @@ quectelmc60.menu.stdio.ttys2=Uart2 (/dev/ttyS2)
 quectelmc60.menu.stdio.ttys2.build.stdio_port=/dev/ttyS2
 
 # upload
-quectelmc60.bootloader.tool=siwiflasher
-quectelmc60.upload.tool=siwiflasher
-quectelmc60.upload.protocol=siwiflasher
+quectelmc60.bootloader.tool=logicromflasher
+quectelmc60.upload.tool=logicromflasher
+quectelmc60.upload.protocol=logicromflasher
 quectelmc60.upload.maximum_size=262144
 quectelmc60.upload.maximum_ram_size=96256
 quectelmc60.upload.speed=460800
@@ -118,7 +118,7 @@ quectelmc60.upload.wait_for_upload_port=true
 quectelmc20.name=Quectel MC20
 
 # build
-quectelmc20.build.core=siwigsm
+quectelmc20.build.core=logicrom
 quectelmc20.build.cpu=arm9ejs
 quectelmc20.build.f_cpu=260000000
 quectelmc20.build.board=QUECTEL_MC20TEA
@@ -140,9 +140,9 @@ quectelmc20.menu.stdio.ttys2=Uart2 (/dev/ttyS2)
 quectelmc20.menu.stdio.ttys2.build.stdio_port=/dev/ttyS2
 
 # upload
-quectelmc20.bootloader.tool=siwiflasher
-quectelmc20.upload.tool=siwiflasher
-quectelmc20.upload.protocol=siwiflasher
+quectelmc20.bootloader.tool=logicromflasher
+quectelmc20.upload.tool=logicromflasher
+quectelmc20.upload.protocol=logicromflasher
 quectelmc20.upload.maximum_size=262144
 quectelmc20.upload.maximum_ram_size=96256
 quectelmc20.upload.speed=460800
@@ -153,7 +153,7 @@ quectelmc20.upload.wait_for_upload_port=true
 quectelm56.name=Quectel M56
 
 # build
-quectelm56.build.core=siwigsm
+quectelm56.build.core=logicrom
 quectelm56.build.cpu=arm9ejs
 quectelm56.build.f_cpu=260000000
 quectelm56.build.board=QUECTEL_M56TEA
@@ -177,9 +177,9 @@ quectelm56.menu.stdio.ttyusb=USB Uart (/dev/ttyUSB0)
 quectelm56.menu.stdio.ttyusb.build.stdio_port=/dev/ttyUSB0
 
 # upload
-quectelm56.bootloader.tool=siwiflasher
-quectelm56.upload.tool=siwiflasher
-quectelm56.upload.protocol=siwiflasher
+quectelm56.bootloader.tool=logicromflasher
+quectelm56.upload.tool=logicromflasher
+quectelm56.upload.protocol=logicromflasher
 quectelm56.upload.maximum_size=262144
 quectelm56.upload.maximum_ram_size=96256
 quectelm56.upload.speed=460800

platform.txt

@@ -1,21 +1,21 @@
-# Copyright (c) 2020 SiWi Embedded Solutions. All right reserved.
-# https://www.siwi.in/
+# Copyright (c) 2021 WAYBYTE Solutions. All right reserved.
+# https://www.waybyte.in/
 #
-# Arduino SiWi Core and platform.
+# LOGICROM Arduino Core and platform.
 #
 # For more info:
 # https://github.com/arduino/Arduino/wiki/Arduino-IDE-1.5---3rd-party-Hardware-specification
 
-name=SIWIGSM Arduino
-version=0.4.0
+name=LOGICROM Arduino
+version=0.5.0
 
 # Tools
 # -----
-tools.gfh_gen.cmd=python "{build.core.path}/siwisdk/tools/GFH_Generator.py"
-tools.gfh_gen.cmd.windows={build.core.path}/siwisdk/tools/GFH_Generator.exe
+tools.gfh_gen.cmd=python "{build.core.path}/logicromsdk/tools/GFH_Generator.py"
+tools.gfh_gen.cmd.windows={build.core.path}/logicromsdk/tools/GFH_Generator.exe
 
-tools.fota_gen.cmd=python "{build.core.path}/siwisdk/tools/FOTA_Generator.py"
-tools.fota_gen.cmd.windows={build.core.path}/siwisdk/tools/FOTA_Generator.exe
+tools.fota_gen.cmd=python "{build.core.path}/logicromsdk/tools/FOTA_Generator.py"
+tools.fota_gen.cmd.windows={build.core.path}/logicromsdk/tools/FOTA_Generator.exe
 
 # compile variables
 # ----------------------
@@ -59,27 +59,27 @@ compiler.ar.extra_flags=
 compiler.elf2bin.extra_flags=
 
 # Include paths
-build.flags.siwigsm="-I{build.core.path}/siwisdk/include" "-I{build.core.path}/siwisdk/include/ril"
+build.flags.logicrom="-I{build.core.path}/logicromsdk/include" "-I{build.core.path}/logicromsdk/include/ril"
 
 # Compile patterns
 # ---------------------
 
 ## Compile c files
-recipe.c.o.pattern="{compiler.path}{compiler.c.cmd}" {compiler.c.flags} -DARDUINO={runtime.ide.version} -DARDUINO_{build.board} -DARDUINO_ARCH_{build.arch} '-DARDUINO_BSP_VERSION="{version}"' {compiler.c.extra_flags} {build.extra_flags} {build.flags.siwigsm} {includes} "{source_file}" -o "{object_file}"
+recipe.c.o.pattern="{compiler.path}{compiler.c.cmd}" {compiler.c.flags} -DARDUINO={runtime.ide.version} -DARDUINO_{build.board} -DARDUINO_ARCH_{build.arch} '-DARDUINO_BSP_VERSION="{version}"' {compiler.c.extra_flags} {build.extra_flags} {build.flags.logicrom} {includes} "{source_file}" -o "{object_file}"
 
 ## Compile c++ files
-recipe.cpp.o.pattern="{compiler.path}{compiler.cpp.cmd}" {compiler.cpp.flags} -DARDUINO={runtime.ide.version} -DARDUINO_{build.board} -DARDUINO_ARCH_{build.arch} '-DARDUINO_BSP_VERSION="{version}"' {compiler.cpp.extra_flags} {build.extra_flags} {build.flags.siwigsm} {includes} "{source_file}" -o "{object_file}"
+recipe.cpp.o.pattern="{compiler.path}{compiler.cpp.cmd}" {compiler.cpp.flags} -DARDUINO={runtime.ide.version} -DARDUINO_{build.board} -DARDUINO_ARCH_{build.arch} '-DARDUINO_BSP_VERSION="{version}"' {compiler.cpp.extra_flags} {build.extra_flags} {build.flags.logicrom} {includes} "{source_file}" -o "{object_file}"
 
 ## Compile S files
-recipe.S.o.pattern="{compiler.path}{compiler.S.cmd}" {compiler.S.flags} -DARDUINO={runtime.ide.version} -DARDUINO_{build.board} -DARDUINO_ARCH_{build.arch} {compiler.S.extra_flags} {build.extra_flags} {build.flags.siwigsm} {includes} "{source_file}" -o "{object_file}"
+recipe.S.o.pattern="{compiler.path}{compiler.S.cmd}" {compiler.S.flags} -DARDUINO={runtime.ide.version} -DARDUINO_{build.board} -DARDUINO_ARCH_{build.arch} {compiler.S.extra_flags} {build.extra_flags} {build.flags.logicrom} {includes} "{source_file}" -o "{object_file}"
 
 ## Create archives
 # archive_file_path is needed for backwards compatibility with IDE 1.6.5 or older, IDE 1.6.6 or newer overrides this value
 archive_file_path={build.path}/{archive_file}
 recipe.ar.pattern="{compiler.path}{compiler.ar.cmd}" {compiler.ar.flags} {compiler.ar.extra_flags} "{archive_file_path}" "{object_file}"
 
 ## Combine gc-sections, archives, and objects
-recipe.c.combine.pattern="{compiler.path}{compiler.c.elf.cmd}" "-L{build.path}" {compiler.c.elf.flags} {compiler.c.elf.extra_flags} "-L{build.core.path}/siwisdk/lib" "-T{build.ldscript}" "-Wl,-Map,{build.path}/{build.project_name}.map" "-Wl,--defsym,platform_init=platform_{build.variant}_init" {compiler.ldflags} -o "{build.path}/{build.project_name}.elf" {object_files} -Wl,--start-group -lsiwisdk{build.build_type} -lc -lgcc -lm "{build.path}/{archive_file}" -Wl,--end-group
+recipe.c.combine.pattern="{compiler.path}{compiler.c.elf.cmd}" "-L{build.path}" {compiler.c.elf.flags} {compiler.c.elf.extra_flags} "-L{build.core.path}/logicromsdk/lib" "-T{build.ldscript}" "-Wl,-Map,{build.path}/{build.project_name}.map" "-Wl,--defsym,platform_init=platform_{build.variant}_init" {compiler.ldflags} -o "{build.path}/{build.project_name}.elf" {object_files} -Wl,--start-group -llogicrom{build.build_type} -lc -lgcc -lm "{build.path}/{archive_file}" -Wl,--end-group
 
 ## Create output (.bin file)
 recipe.objcopy.bin.1.pattern="{compiler.path}{compiler.elf2bin.cmd}" {compiler.elf2bin.flags} {compiler.elf2bin.extra_flags} "{build.path}/{build.project_name}.elf" "{build.path}/temp.bin"
@@ -96,20 +96,20 @@ recipe.size.regex=^(?:\.text|\.data|\.rodata|\.text.align|\.ARM.exidx|\.ARM.exta
 recipe.size.regex.data=^(?:\.data|\.bss|\.noinit)\s+(\d+).*
 
 ## sketch uploader
-tools.siwiflasher.path={runtime.tools.siwiflasher.path}
-tools.siwiflasher.cmd=python "{path}/siwiflasher.py"
-tools.siwiflasher.cmd.windows={path}/siwiflasher.exe
+tools.logicromflasher.path={runtime.tools.logicromflasher.path}
+tools.logicromflasher.cmd=python "{path}/logicromflasher.py"
+tools.logicromflasher.cmd.windows={path}/logicromflasher.exe
 
-tools.siwiflasher.upload.params.verbose=
-tools.siwiflasher.upload.params.quiet=
-tools.siwiflasher.upload.pattern={cmd} -p {serial.port} -b {upload.speed} "{upload.verbose}" "{build.path}/{build.project_name}.bin"
+tools.logicromflasher.upload.params.verbose=
+tools.logicromflasher.upload.params.quiet=
+tools.logicromflasher.upload.pattern={cmd} -p {serial.port} -b {upload.speed} "{upload.verbose}" "{build.path}/{build.project_name}.bin"
 
-## bootloader tool is the siwiflasher
-tools.siwiflasher.bootloader.params.verbose=
-tools.siwiflasher.bootloader.params.quiet=
-tools.siwiflasher.bootloader.pattern={program.burn_pattern}
+## bootloader tool is the logicromflasher
+tools.logicromflasher.bootloader.params.verbose=
+tools.logicromflasher.bootloader.params.quiet=
+tools.logicromflasher.bootloader.pattern={program.burn_pattern}
 
 ## dummy erase option to make tool menu work
-tools.siwiflasher.erase.params.verbose=
-tools.siwiflasher.erase.params.quiet=
-tools.siwiflasher.erase.pattern=
+tools.logicromflasher.erase.params.verbose=
+tools.logicromflasher.erase.params.quiet=
+tools.logicromflasher.erase.pattern=

programmers.txt

@@ -1,20 +1,19 @@
-# Copyright (c) 2020 SiWi Embedded Solutions. All right reserved.
-# https://www.siwi.in/
+# Copyright (c) 2021 WAYBYTE Solutions. All right reserved.
+# https://www.waybyte.in/
 #
-# Siwi Flasher Core Programmer
+# LOGICROM Core Flasher
 #
 
-siwiflasher.name=Core Flasher for SiWiGSM
-siwiflasher.program.tool=siwiflasher
-siwiflasher.program.path={runtime.tools.siwiflasher.path}
-siwiflasher.program.cmd=python "{program.path}/siwiflasher.py"
-siwiflasher.program.cmd.windows={program.path}/siwiflasher.exe
+logicromflasher.name=LOGICROM Core Flasher
+logicromflasher.program.tool=logicromflasher
+logicromflasher.program.path={runtime.tools.logicromflasher.path}
+logicromflasher.program.cmd=python "{program.path}/logicromflasher.py"
+logicromflasher.program.cmd.windows={program.path}/logicromflasher.exe
 
 # Burn bootloader pattern
-siwiflasher.program.burn_pattern="{program.cmd}" -p {serial.port} -b {upload.speed} -r
+logicromflasher.program.burn_pattern="{program.cmd}" -p {serial.port} -b {upload.speed} -r
 
 # Upload sketch
-siwiflasher.program.params.quiet=
-siwiflasher.program.params.verbose=
-siwiflasher.program.pattern="{program.cmd}" -p {serial.port} -b {upload.speed} "{build.path}/{build.project_name}.bin"
-
+logicromflasher.program.params.quiet=
+logicromflasher.program.params.verbose=
+logicromflasher.program.pattern="{program.cmd}" -p {serial.port} -b {upload.speed} "{build.path}/{build.project_name}.bin"