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boards: Add modules based on ASR160x chipset
Signed-off-by: Ajay Bhargav <[email protected]>
1 parent 70319a6 commit 6f92bb5

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10 files changed

+340
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‎boards/a7670.json‎

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{
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"build": {
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"core": "logicrom",
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"cpu": "armv7a",
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"f_cpu": "416000000L",
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"mcu": "ASR1601",
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"variant": "a7670",
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"flashsz": "16M",
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"logicromtype": "release",
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"extra_flags": "-DSOC_ASR160X=1 -DSOC_ASR1601=1 -DPLATFORM_A7670=1",
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"hwids": [
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[
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"0x2ECC",
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"0x3015"
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]
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]
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},
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"connectivity": [
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"gsm",
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"LTE Cat.1"
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],
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"frameworks": [
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"logicromsdk"
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],
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"name": "SIMCOM A7670X LTE Cat.1 Module",
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"upload": {
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"maximum_ram_size": 524288,
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"maximum_size": 1048576,
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"require_upload_port": false,
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"speed": 460800
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},
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"url": "",
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"vendor": "SIMCom"
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}

‎boards/ec100n.json‎

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{
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"build": {
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"core": "logicrom",
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"cpu": "armv7a",
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"f_cpu": "416000000L",
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"mcu": "ASR1603",
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"variant": "ec100n",
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"flashsz": "16M",
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"logicromtype": "release",
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"extra_flags": "-DSOC_ASR160X=1 -DSOC_ASR1603=1 -DPLATFORM_EC100N=1",
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"hwids": [
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[
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"0x2ECC",
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"0x3015"
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]
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]
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},
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"connectivity": [
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"gsm",
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"LTE Cat.1"
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],
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"frameworks": [
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"logicromsdk"
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],
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"name": "Quectel EC100N LTE Cat.1 Module",
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"upload": {
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"maximum_ram_size": 524288,
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"maximum_size": 1048576,
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"require_upload_port": false,
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"speed": 460800
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},
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"url": "",
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"vendor": "Quectel Wireless Solutions Co., Ltd."
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}

‎boards/ec100s.json‎

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{
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"build": {
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"core": "logicrom",
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"cpu": "armv7a",
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"f_cpu": "416000000L",
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"mcu": "ASR1601",
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"variant": "ec100s",
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"flashsz": "16M",
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"logicromtype": "release",
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"extra_flags": "-DSOC_ASR160X=1 -DSOC_ASR1601=1 -DPLATFORM_EC100S=1",
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"hwids": [
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[
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"0x2ECC",
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"0x3015"
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]
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]
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},
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"connectivity": [
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"gsm",
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"LTE Cat.1"
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],
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"frameworks": [
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"logicromsdk"
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],
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"name": "Quectel EC100S LTE Cat.1 Module",
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"upload": {
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"maximum_ram_size": 524288,
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"maximum_size": 1048576,
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"require_upload_port": false,
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"speed": 460800
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},
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"url": "",
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"vendor": "Quectel Wireless Solutions Co., Ltd."
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}

‎boards/ec100y.json‎

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{
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"build": {
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"core": "logicrom",
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"cpu": "armv7a",
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"f_cpu": "416000000L",
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"mcu": "ASR1601",
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"variant": "ec100y",
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"flashsz": "16M",
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"logicromtype": "release",
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"extra_flags": "-DSOC_ASR160X=1 -DSOC_ASR1601=1 -DPLATFORM_EC100Y=1",
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"hwids": [
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[
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"0x2ECC",
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"0x3015"
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]
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]
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},
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"connectivity": [
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"gsm",
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"LTE Cat.1"
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],
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"frameworks": [
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"logicromsdk"
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],
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"name": "Quectel EC100Y LTE Cat.1 Module",
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"upload": {
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"maximum_ram_size": 524288,
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"maximum_size": 1048576,
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"require_upload_port": false,
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"speed": 460800
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},
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"url": "",
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"vendor": "Quectel Wireless Solutions Co., Ltd."
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}

‎boards/ec200n.json‎

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{
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"build": {
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"core": "logicrom",
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"cpu": "armv7a",
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"f_cpu": "416000000L",
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"mcu": "ASR1603",
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"variant": "ec200n",
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"flashsz": "8M",
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"logicromtype": "release",
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"extra_flags": "-DSOC_ASR160X=1 -DSOC_ASR1603=1 -DPLATFORM_EC200N=1",
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"hwids": [
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[
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"0x2ECC",
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"0x3015"
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]
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]
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},
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"connectivity": [
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"gsm",
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"LTE Cat.1"
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],
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"frameworks": [
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"logicromsdk"
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],
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"name": "Quectel EC200N LTE Cat.1 Module",
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"upload": {
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"maximum_ram_size": 524288,
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"maximum_size": 524288,
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"require_upload_port": false,
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"speed": 460800
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},
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"url": "",
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"vendor": "Quectel Wireless Solutions Co., Ltd."
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}

‎boards/ec200s.json‎

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{
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"build": {
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"core": "logicrom",
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"cpu": "armv7a",
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"f_cpu": "416000000L",
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"mcu": "ASR1601",
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"variant": "ec200s",
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"flashsz": "16M",
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"logicromtype": "release",
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"extra_flags": "-DSOC_ASR160X=1 -DSOC_ASR1601=1 -DPLATFORM_EC200S=1",
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"hwids": [
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[
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"0x2ECC",
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"0x3015"
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]
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]
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},
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"connectivity": [
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"gsm",
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"LTE Cat.1"
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],
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"frameworks": [
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"logicromsdk"
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],
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"name": "Quectel EC200S LTE Cat.1 Module",
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"upload": {
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"maximum_ram_size": 524288,
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"maximum_size": 1048576,
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"require_upload_port": false,
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"speed": 460800
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},
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"url": "",
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"vendor": "Quectel Wireless Solutions Co., Ltd."
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}

‎boards/ec600n.json‎

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{
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"build": {
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"core": "logicrom",
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"cpu": "armv7a",
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"f_cpu": "416000000L",
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"mcu": "ASR1603",
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"variant": "ec600n",
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"flashsz": "16M",
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"logicromtype": "release",
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"extra_flags": "-DSOC_ASR160X=1 -DSOC_ASR1603=1 -DPLATFORM_EC600N=1",
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"hwids": [
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[
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"0x2ECC",
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"0x3015"
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]
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]
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},
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"connectivity": [
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"gsm",
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"LTE Cat.1"
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],
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"frameworks": [
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"logicromsdk"
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],
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"name": "Quectel EC600N LTE Cat.1 Module",
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"upload": {
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"maximum_ram_size": 524288,
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"maximum_size": 1048576,
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"require_upload_port": false,
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"speed": 460800
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},
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"url": "",
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"vendor": "Quectel Wireless Solutions Co., Ltd."
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}

‎boards/ec600s.json‎

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{
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"build": {
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"core": "logicrom",
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"cpu": "armv7a",
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"f_cpu": "416000000L",
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"mcu": "ASR1601",
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"variant": "ec100s",
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"flashsz": "16M",
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"logicromtype": "release",
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"extra_flags": "-DSOC_ASR160X=1 -DSOC_ASR1601=1 -DPLATFORM_EC600S=1",
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"hwids": [
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[
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"0x2ECC",
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"0x3015"
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]
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]
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},
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"connectivity": [
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"gsm",
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"LTE Cat.1"
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],
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"frameworks": [
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"logicromsdk"
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],
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"name": "Quectel EC600S LTE Cat.1 Module",
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"upload": {
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"maximum_ram_size": 524288,
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"maximum_size": 1048576,
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"require_upload_port": false,
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"speed": 460800
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},
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"url": "",
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"vendor": "Quectel Wireless Solutions Co., Ltd."
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}

‎boards/eg912y.json‎

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{
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"build": {
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"core": "logicrom",
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"cpu": "armv7a",
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"f_cpu": "416000000L",
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"mcu": "ASR1603",
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"variant": "eg912y",
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"flashsz": "8M",
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"logicromtype": "release",
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"extra_flags": "-DSOC_ASR160X=1 -DSOC_ASR1603=1 -DPLATFORM_EG912Y=1",
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"hwids": [
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[
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"0x2ECC",
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"0x3015"
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]
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]
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},
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"connectivity": [
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"gsm",
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"LTE Cat.1"
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],
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"frameworks": [
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"logicromsdk"
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],
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"name": "Quectel EG912Y LTE Cat.1 Module",
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"upload": {
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"maximum_ram_size": 524288,
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"maximum_size": 524288,
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"require_upload_port": false,
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"speed": 460800
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},
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"url": "",
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"vendor": "Quectel Wireless Solutions Co., Ltd."
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}

‎boards/eg915n.json‎

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{
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"build": {
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"core": "logicrom",
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"cpu": "armv7a",
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"f_cpu": "416000000L",
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"mcu": "ASR1603",
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"variant": "eg915n",
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"flashsz": "16M",
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"logicromtype": "release",
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"extra_flags": "-DSOC_ASR160X=1 -DSOC_ASR1603=1 -DPLATFORM_EG915N=1",
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"hwids": [
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[
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"0x2ECC",
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"0x3015"
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]
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]
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},
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"connectivity": [
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"gsm",
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"LTE Cat.1"
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],
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"frameworks": [
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"logicromsdk"
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],
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"name": "Quectel EG915N LTE Cat.1 Module",
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"upload": {
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"maximum_ram_size": 524288,
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"maximum_size": 1048576,
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"require_upload_port": false,
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"speed": 460800
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},
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"url": "",
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"vendor": "Quectel Wireless Solutions Co., Ltd."
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}

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