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fix: Wrong prescaler for Timer2
fix #5
1 parent ae5caeb commit 620b1f5

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2 files changed

+44
-6
lines changed

2 files changed

+44
-6
lines changed

src/timer.spec.ts

Lines changed: 14 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
import { CPU } from './cpu';
2-
import { AVRTimer, timer0Config } from './timer';
2+
import { AVRTimer, timer0Config, timer2Config } from './timer';
33

44
describe('timer', () => {
55
let cpu: CPU;
@@ -188,4 +188,17 @@ describe('timer', () => {
188188
expect(cpu.pc).toEqual(0x1e);
189189
expect(cpu.cycles).toEqual(3);
190190
});
191+
192+
it('timer2 should count every 256 ticks when prescaler is 6 (issue #5)', () => {
193+
const timer = new AVRTimer(cpu, timer2Config);
194+
cpu.data[0xb1] = 0x6; // TCCR1B.CS <- 6
195+
196+
cpu.cycles = 511;
197+
timer.tick();
198+
expect(cpu.data[0xb2]).toEqual(1); // TCNT2 should be 2
199+
200+
cpu.cycles = 512;
201+
timer.tick();
202+
expect(cpu.data[0xb2]).toEqual(2); // TCNT2 should be 2
203+
});
191204
});

src/timer.ts

Lines changed: 30 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -9,7 +9,7 @@
99
import { CPU } from './cpu';
1010
import { avrInterrupt } from './interrupt';
1111

12-
const dividers = {
12+
const timer01Dividers = {
1313
0: 0,
1414
1: 1,
1515
2: 8,
@@ -35,6 +35,17 @@ const OCIEB = 4;
3535

3636
type u8 = number;
3737

38+
interface ITimerDividers {
39+
0: number;
40+
1: number;
41+
2: number;
42+
3: number;
43+
4: number;
44+
5: number;
45+
6: number;
46+
7: number;
47+
}
48+
3849
interface AVRTimerConfig {
3950
bits: 8 | 16;
4051
captureInterrupt: u8;
@@ -52,6 +63,8 @@ interface AVRTimerConfig {
5263
TCCRB: u8;
5364
TCCRC: u8;
5465
TIMSK: u8;
66+
67+
dividers: ITimerDividers;
5568
}
5669

5770
export const timer0Config: AVRTimerConfig = {
@@ -68,7 +81,8 @@ export const timer0Config: AVRTimerConfig = {
6881
TCCRA: 0x44,
6982
TCCRB: 0x45,
7083
TCCRC: 0, // not available
71-
TIMSK: 0x6e
84+
TIMSK: 0x6e,
85+
dividers: timer01Dividers
7286
};
7387

7488
export const timer1Config: AVRTimerConfig = {
@@ -85,7 +99,8 @@ export const timer1Config: AVRTimerConfig = {
8599
TCCRA: 0x80,
86100
TCCRB: 0x81,
87101
TCCRC: 0x82,
88-
TIMSK: 0x6f
102+
TIMSK: 0x6f,
103+
dividers: timer01Dividers
89104
};
90105

91106
export const timer2Config: AVRTimerConfig = {
@@ -102,7 +117,17 @@ export const timer2Config: AVRTimerConfig = {
102117
TCCRA: 0xb0,
103118
TCCRB: 0xb1,
104119
TCCRC: 0, // not available
105-
TIMSK: 0x70
120+
TIMSK: 0x70,
121+
dividers: {
122+
0: 1,
123+
1: 1,
124+
2: 8,
125+
3: 32,
126+
4: 64,
127+
5: 128,
128+
6: 256,
129+
7: 1024
130+
}
106131
};
107132

108133
export class AVRTimer {
@@ -169,7 +194,7 @@ export class AVRTimer {
169194
}
170195

171196
tick() {
172-
const divider = dividers[this.CS];
197+
const divider = this.config.dividers[this.CS];
173198
const delta = this.cpu.cycles - this.lastCycle;
174199
if (divider && delta >= divider) {
175200
const counterDelta = Math.floor(delta / divider);

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