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danielinuxdanielinux
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MCXA / MCXW support: updated to latest mcux-sdk
1 parent 6172f82 commit 7b6fc39

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4 files changed

+38
-67
lines changed

4 files changed

+38
-67
lines changed

‎arch.mk‎

Lines changed: 8 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -613,6 +613,7 @@ ifeq ($(TARGET),mcxa)
613613
CFLAGS+=\
614614
-I$(MCUXPRESSO_DRIVERS) \
615615
-I$(MCUXPRESSO_DRIVERS)/drivers \
616+
-I$(MCUXPRESSO_DRIVERS)/drivers/common \
616617
-I$(MCUXPRESSO)/drivers \
617618
-I$(MCUXPRESSO)/drivers/common \
618619
-I$(MCUXPRESSO_CMSIS)/Include \
@@ -624,7 +625,8 @@ ifeq ($(TARGET),mcxa)
624625
LDFLAGS+=-mcpu=cortex-m33
625626
OBJS+=\
626627
$(MCUXPRESSO_DRIVERS)/drivers/fsl_clock.o \
627-
$(MCUXPRESSO)/drivers/mcx_spc/fsl_spc.o
628+
$(MCUXPRESSO)/drivers/mcx_spc/fsl_spc.o \
629+
$(MCUXPRESSO_DRIVERS)/project_template/clock_config.o
628630

629631
CFLAGS+=\
630632
-I$(MCUXPRESSO)/drivers/flash \
@@ -642,6 +644,8 @@ ifeq ($(TARGET),mcxw)
642644
-I$(MCUXPRESSO_DRIVERS)/drivers \
643645
-I$(MCUXPRESSO_DRIVERS)/periph2 \
644646
-I$(MCUXPRESSO)/drivers \
647+
-I$(MCUXPRESSO)/drivers/flash_k4 \
648+
-I$(MCUXPRESSO)/drivers/ccm32k \
645649
-I$(MCUXPRESSO)/drivers/common \
646650
-I$(MCUXPRESSO_CMSIS)/Include \
647651
-I$(MCUXPRESSO_CMSIS)/Core/Include
@@ -652,14 +656,14 @@ ifeq ($(TARGET),mcxw)
652656
LDFLAGS+=-mcpu=cortex-m33
653657
OBJS+=\
654658
$(MCUXPRESSO_DRIVERS)/drivers/fsl_clock.o \
655-
$(MCUXPRESSO)/drivers/mcx_spc/fsl_spc.o \
659+
$(MCUXPRESSO)/drivers/spc/fsl_spc.o \
656660
$(MCUXPRESSO_DRIVERS)/project_template/clock_config.o \
657-
$(MCUXPRESSO_DRIVERS)/drivers/fsl_ccm32k.o \
661+
$(MCUXPRESSO)/drivers/ccm32k/fsl_ccm32k.o \
658662
$(MCUXPRESSO_DRIVERS)/drivers/fsl_romapi.o
659663

660664
CFLAGS+=\
661665
-I$(MCUXPRESSO)/drivers/flash \
662-
-I$(MCUXPRESSO)/drivers/mcx_spc \
666+
-I$(MCUXPRESSO)/drivers/spc \
663667
-I$(MCUXPRESSO)/drivers/sysmpu \
664668
-I$(MCUXPRESSO)/drivers/ltc \
665669
-I$(MCUXPRESSO)/drivers/port \

‎hal/mcxa.c‎

Lines changed: 4 additions & 51 deletions
Original file line numberDiff line numberDiff line change
@@ -38,6 +38,10 @@
3838
static flash_config_t pflash;
3939
static int flash_init = 0;
4040

41+
uint32_t SystemCoreClock;
42+
43+
extern void BOARD_BootClockFRO96M(void);
44+
4145
#ifdef __WOLFBOOT
4246
/* Assert hook needed by Kinetis SDK */
4347
void __assert_func(const char *a, int b, const char *c, const char *d)
@@ -46,57 +50,6 @@ void __assert_func(const char *a, int b, const char *c, const char *d)
4650
;
4751
}
4852

49-
/* The following clock setting function is autogenerated by the MCUXpresso IDE */
50-
void BOARD_BootClockFRO96M(void)
51-
{
52-
uint32_t coreFreq;
53-
spc_active_mode_core_ldo_option_t ldoOption;
54-
spc_sram_voltage_config_t sramOption;
55-
56-
/* Get the CPU Core frequency */
57-
coreFreq = CLOCK_GetCoreSysClkFreq();
58-
59-
/* The flow of increasing voltage and frequency */
60-
if (coreFreq <= BOARD_BOOTCLOCKFRO96M_CORE_CLOCK) {
61-
/* Set the LDO_CORE VDD regulator level */
62-
ldoOption.CoreLDOVoltage = kSPC_CoreLDO_NormalVoltage;
63-
ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength;
64-
(void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption);
65-
/* Configure Flash to support different voltage level and frequency */
66-
FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x2U));
67-
/* Specifies the operating voltage for the SRAM's read/write timing margin */
68-
sramOption.operateVoltage = kSPC_sramOperateAt1P1V;
69-
sramOption.requestVoltageUpdate = true;
70-
(void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption);
71-
}
72-
73-
CLOCK_SetupFROHFClocking(96000000U); /*!< Enable FRO HF(96MHz) output */
74-
75-
CLOCK_SetupFRO12MClocking(); /*!< Setup FRO12M clock */
76-
77-
CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK); /* !< Switch MAIN_CLK to FRO_HF */
78-
79-
/* The flow of decreasing voltage and frequency */
80-
if (coreFreq > BOARD_BOOTCLOCKFRO96M_CORE_CLOCK) {
81-
/* Configure Flash to support different voltage level and frequency */
82-
FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x2U));
83-
/* Specifies the operating voltage for the SRAM's read/write timing margin */
84-
sramOption.operateVoltage = kSPC_sramOperateAt1P1V;
85-
sramOption.requestVoltageUpdate = true;
86-
(void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption);
87-
/* Set the LDO_CORE VDD regulator level */
88-
ldoOption.CoreLDOVoltage = kSPC_CoreLDO_NormalVoltage;
89-
ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength;
90-
(void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption);
91-
}
92-
93-
/*!< Set up clock selectors - Attach clocks to the peripheries */
94-
95-
/*!< Set up dividers */
96-
CLOCK_SetClockDiv(kCLOCK_DivAHBCLK, 1U); /* !< Set AHBCLKDIV divider to value 1 */
97-
CLOCK_SetClockDiv(kCLOCK_DivFRO_HF_DIV, 1U); /* !< Set FROHFDIV divider to value 1 */
98-
}
99-
10053
void hal_init(void)
10154
{
10255
/* Clock setting */

‎hal/mcxw.c‎

Lines changed: 23 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -30,12 +30,15 @@
3030

3131
/* Clock + RAM voltage settings */
3232
#include "fsl_clock.h"
33-
#include "fsl_spc.h"
33+
//#include "fsl_spc.h"
3434

3535
/* Flash driver */
3636
#include "fsl_device_registers.h"
3737
#include "fsl_lpspi_flash.h"
38-
#include "fsl_k4_flash.h"
38+
#include "fsl_flash_api.h"
39+
#include "fsl_ccm32k.h"
40+
41+
#define FLASH FMU0
3942

4043
/*!< Core clock frequency: 48000000Hz */
4144
#define BOARD_BOOTCLOCKRUN_CORE_CLOCK 48000000U
@@ -87,24 +90,24 @@ int RAMFUNCTION hal_flash_write(uint32_t address, const uint8_t *data, int len)
8790
{
8891
int ret;
8992
int w = 0;
90-
const uint8_t empty_qword[16] = {
91-
0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
92-
0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF
93+
const uint32_t empty_qword[4] = {
94+
0xFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF
9395
};
9496

9597
while (len > 0) {
96-
if ((len < 16) || address & 0x0F) {
97-
uint8_t aligned_qword[16];
98+
if ((len < 16) || (address & 0x0F)) {
99+
uint32_t aligned_qword[4];
98100
uint32_t address_align = address - (address & 0x0F);
99101
uint32_t start_off = address - address_align;
100102
int i;
101103

102104
memcpy(aligned_qword, (void*)address_align, 16);
103105
for (i = start_off; ((i < 16) && (i < len + (int)start_off)); i++) {
104-
aligned_qword[i] = data[w++];
106+
((uint8_t *)aligned_qword)[i] = data[w++];
105107
}
106108
if (memcmp(aligned_qword, empty_qword, 16) != 0) {
107-
ret = FLASH_Program(&pflash, FLASH, address_align, aligned_qword, 16);
109+
ret = FLASH_Program(&pflash, FLASH, address_align, aligned_qword,
110+
16);
108111
if (ret != kStatus_Success)
109112
return -1;
110113
}
@@ -113,7 +116,17 @@ int RAMFUNCTION hal_flash_write(uint32_t address, const uint8_t *data, int len)
113116
}
114117
else {
115118
uint32_t len_align = len - (len & 0x0F);
116-
ret = FLASH_Program(&pflash, FLASH, address, (uint8_t*)data + w, len_align);
119+
if (((uint32_t)data + w) & 0x0F) {
120+
uint32_t __attribute__((aligned(16))) aligned_data[4];
121+
memcpy(aligned_data, (void*)((uint32_t)data + w), len_align);
122+
ret = FLASH_Program(&pflash, FLASH, address, (uint32_t*)data + w,
123+
len_align);
124+
}
125+
else
126+
{
127+
ret = FLASH_Program(&pflash, FLASH, address, (uint32_t*)data + w,
128+
len_align);
129+
}
117130
if (ret != kStatus_Success)
118131
return -1;
119132
len -= len_align;

‎test-app/Makefile‎

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -296,6 +296,7 @@ endif
296296

297297
ifeq ($(TARGET),mcxa)
298298
LSCRIPT_TEMPLATE=ARM-mcxa.ld
299+
APP_OBJS+=$(MCUXPRESSO_DRIVERS)/project_template/clock_config.o
299300
APP_OBJS+=$(MCUXPRESSO_DRIVERS)/drivers/fsl_clock.o
300301
APP_OBJS+=$(MCUXPRESSO_DRIVERS)/drivers/fsl_reset.o
301302
APP_OBJS+=$(MCUXPRESSO)/drivers/gpio/fsl_gpio.o
@@ -306,9 +307,9 @@ ifeq ($(TARGET),mcxw)
306307
LSCRIPT_TEMPLATE=ARM-mcxw.ld
307308
APP_OBJS+=$(MCUXPRESSO_DRIVERS)/drivers/fsl_clock.o
308309
APP_OBJS+=$(MCUXPRESSO)/drivers/gpio/fsl_gpio.o
309-
APP_OBJS+=$(MCUXPRESSO)/drivers/mcx_spc/fsl_spc.o
310+
APP_OBJS+=$(MCUXPRESSO)/drivers/spc/fsl_spc.o
310311
APP_OBJS+=$(MCUXPRESSO_DRIVERS)/project_template/clock_config.o
311-
APP_OBJS+=$(MCUXPRESSO_DRIVERS)/drivers/fsl_ccm32k.o
312+
APP_OBJS+=$(MCUXPRESSO)/drivers/ccm32k/fsl_ccm32k.o
312313
APP_OBJS+=$(MCUXPRESSO_DRIVERS)/drivers/fsl_romapi.o
313314
endif
314315

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